A parameter is required to allow the selection of either the front or back S-ATA ports to be used for North/South links.
Since this swap affects each FPGA differently this either requires each FPGA to have its own bitfile or connections to the gigabit transceivers to be soft switched by the ID signal. In the later case, further problems arise if differing speeds are required for each link...
A parameter is required to allow the selection of either the front or back S-ATA ports to be used for North/South links.
Since this swap affects each FPGA differently this either requires each FPGA to have its own bitfile or connections to the gigabit transceivers to be soft switched by the ID signal. In the later case, further problems arise if differing speeds are required for each link...