Uses an LFSR to generate the contents of idle frames to reduce the amount of interference caused by the synchronised generation of idle frames on many links.
@lplana Is this branch ready to be merged into master? I noticed that all the FPGAs in recently build SpiNNaker systems have the same version number as this branch so I presume this is good to go?
Uses an LFSR to generate the contents of idle frames to reduce the amount of interference caused by the synchronised generation of idle frames on many links.
@lplana Is this branch ready to be merged into master? I noticed that all the FPGAs in recently build SpiNNaker systems have the same version number as this branch so I presume this is good to go?