Open zhangkanqi opened 1 month ago
Hi,
I tried to reproduce, but on my side it is fine :
#include "../../driver/privileged.h"
trap_setup
machine_to_user
.word 0xffffffff
trap_handle
csrr x1, mtval // => 0xffffffff
j pass
I would need your exact setup to reproduce. When using fuzing, i noticed that very often the symptoms detected by the testbench are kinda far apparts from the reason why things are going wrong :)
Sorry, I will provide all files used for debugging in later issues. I'm a little bit lazy this time hh. For debug: update_mtval_incorrect.zip
For reproduce: NaxRiscv: f335738370e50d5d23614150c3e8c4a85685e43a
cd $NAXRISCV
vim NaxRiscv/src/main/scala/naxriscv/Gen.scala # enable Rvc&float&double in Gen64
sbt "runMain naxriscv.Gen64"
cd $NAXRISCV/src/test/cpp/naxriscv
./obj_dir/VNaxRiscv --load-elf=./input_nax_53.elf --start-symbol=_start --pass-symbol=write_tohost --timeout=100000 --name=input_nax_0 --trace --trace-ref --spike-debug
Hi, It seems NaxRiscv wants to update tval when trapping exception in the source codes.
But I found that when encounters illegal_inst exception under U-mode(the exception is trapped into M-mode), NaxRiscv doesn't update
mtval
correctly, the value ofmtval
is still 0x0.