SpinalHDL / SaxonSoc

SoC based on VexRiscv and ICE40 UP5K
MIT License
151 stars 40 forks source link

Update Tang support #25

Closed roman3017 closed 4 years ago

roman3017 commented 4 years ago
roman3017 commented 4 years ago

There are two more things I would like to change here (and which I need to learn):

Dolu1990 commented 4 years ago

@roman3017 Let's me know if your hit a rock :)

roman3017 commented 4 years ago

The 64KB of BRAM32K is working. It is initialised with machineModeSbi and u-boot-spl images. I will try to make a small kernel for it. The current code works for me and can be merged. It loads kernel from SD and jumps to it.

*** VexRiscv BIOS ***
*** Supervisor ***

U-Boot SPL 2020.01-00088-g4c8c4fb9dc-dirty (Feb 15 2020 - 13:54:48 -0800)
Trying to boot from MMC1
Entering kernel: 0x80008000, arg pointer: 0x80007000

According to me this board is a good application for u-boot-spl. It uses 64KB of BRAM32K with 16KB for sbi plus 48KB for u-boot. It has another 64KB of EMB9K BRAM instantiated by default for other use. At the moment I do not know a way to add u-boot to SPI flash and read it back from bootloader but the current solution does not require it.

Utilization Statistics
#lut                 6647   out of  19600   33.91%
#reg                 3295   out of  19600   16.81%
#le                  7157
  #lut only          3862   out of   7157   53.96%
  #reg only           510   out of   7157    7.13%
  #lut&reg           2785   out of   7157   38.91%
#dsp                    4   out of     29   13.79%
#bram                  30   out of     64   46.88%
  #bram9k              30
  #fifo9k               0
#bram32k               16   out of     16  100.00%
#pad                   21   out of    188   11.17%
  #ireg                 5
  #oreg                 2
  #treg                 0
#pll                    0   out of      4    0.00%

Got also a similar board TEC0117 with Gowin GW1NR-9 FPGA, which also has 8MB on chip SDRAM, 8MB SPI flash but no SD.

roman3017 commented 4 years ago

@Dolu1990 Would you prefer to move the file BlackBox.scala to SpinalHDL repo?

Dolu1990 commented 4 years ago

Would you prefer to move the file BlackBox.scala to SpinalHDL repo?

Ultimately it is better yes :)

So about the unburtifying of 32 bits ram on BMB, Basicaly the detection of the case is here : https://github.com/SpinalHDL/SpinalHDL/blob/dev/lib/src/main/scala/spinal/lib/generator/BmbInterconnectGenerator.scala#L151

So if the bus is 32 bits, lengthWidth is 2, and allignement != BYTE, that should be ok.

roman3017 commented 4 years ago

I am not sure what happened here. I did not close this.

Dolu1990 commented 4 years ago

Same to me, loocked weird XD

roman3017 commented 4 years ago

I have deleted my forks and recreated PRs.