update the image "sch.png" in ApbPwm.assets

[zhutmost]

As the sample code in "ApbPwm.solution" shows, the output signal "pwm" should be latched in a register. However, in the schematic figure, the "pwm" is a combinatorial output instead of a registered output, which may mislead the learners.

sch.png

solution code

val logic = new Area {
    val enable    = Reg(Bool) init(False)
    val timer     = Reg(UInt(timerWidth bits)) init(0)
    val dutyCycle = Reg(UInt(timerWidth bits))
    val output = Reg(Bool) init(False)                       // <=== This is a reg

    when(enable) {
      timer := timer + 1
    }

    when(timer === 0){
      output := True
    }
    when(timer === dutyCycle){
      output := False
    }
    io.pwm := output
}

[Dolu1990]

Hi,

For which reasons the output should be registred ? To avoid having transitional states of the comparator driving an physical pin of the chip ? Or there is also another reason ?

[zhutmost]

I know this. That is not an important problem. I just mean this output register is not obvious in the figure, which may confuse users.

[Dolu1990]

Hooo i got it now. Sure i will update the thing.

[Dolu1990]

Fixed, thanks :)