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SpinalHDL / VexRiscv

A FPGA friendly 32 bit RISC-V CPU implementation
MIT License
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Some documentation on Timer/interrupts #360

Open Jupestrone opened 1 year ago

Jupestrone commented 1 year ago

Currently I am working on a project that is based on the Murax SoC. At this moment I am focused on the function of interrupts.

Is there any documentation on the Timer used or in the pin that allready exists for external interrupts?

Thanks in advance!!

Dolu1990 commented 1 year ago

Hi, there is no realy doc, but examples in the VexRiscvSocSoftware repository