Fix SMP compile-time error when disabling supervisor option

SpinalHDL / VexRiscv

A FPGA friendly 32 bit RISC-V CPU implementation

MIT License

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Fix SMP compile-time error when disabling supervisor option #397

Closed cherrypiejam closed 8 months ago

cherrypiejam commented 8 months ago

When generating SMP configuration with supervisor disable, the compiler stucks at waiting for the signal from externalSupervisorInterrupt, which is generated conditionally based on withSupervisor in CsrPlugin.

Dolu1990 commented 8 months ago

Thanks ^^