VexRiscV shift bus fail

[MrJake222]

Hi, I'm trying to hook VexRiscV small and productive variant to my own SoC, and (after fighting a lot of bus errors) I'm at a loss now. Why earlier (270us) shift works and after some time at 410 us same instruction causes icmd_valid to go low?

WORKS

DOESN'T WORK

Code being executed:

#define RED     0
#define GREEN   4
#define BLUE    8
#define LED_BASE     0x10000
#define LED_SET(id, val) (*(volatile unsigned int*)(LED_BASE + id)) = val;

void led_set_gamma(int id, int i) {
    LED_SET(id, i*i / 256);
}

void breathe(int id) {
    for (int i=255; i>=0; i--) {
        led_set_gamma(id, i);
    }

    for (int i=0; i<256; i++) {
        led_set_gamma(id, i);
    }
}

int main(void) {
    LED_SET(RED, 255);
    LED_SET(GREEN, 255);
    LED_SET(BLUE, 255);

    while(1) {
        breathe(RED);
        breathe(GREEN);
        breathe(BLUE);
    }
}

__attribute__ ((section(".boot")))
__attribute__ ((naked))
void _start(void) {
    asm("lui sp, 0x10");
    asm("j main");
}

led_breathe.elf:     file format elf32-littleriscv

Disassembly of section .text:

00020000 <_start>:
   20000:       00010137                lui     sp,0x10
   20004:       0b00006f                j       200b4 <main>

00020008 <led_set_gamma>:
   20008:       ff010113                addi    sp,sp,-16 # fff0 <_bss_end+0xfff0>
   2000c:       00112623                sw      ra,12(sp)
   20010:       00812423                sw      s0,8(sp)
   20014:       00050413                mv      s0,a0
   20018:       00058513                mv      a0,a1
   2001c:       000107b7                lui     a5,0x10
   20020:       00f40433                add     s0,s0,a5
   20024:       0cc000ef                jal     200f0 <__mulsi3>
   20028:       41f55793                srai    a5,a0,0x1f
   2002c:       0ff7f793                zext.b  a5,a5
   20030:       00a787b3                add     a5,a5,a0
   20034:       4087d793                srai    a5,a5,0x8
   20038:       00f42023                sw      a5,0(s0)
   2003c:       00c12083                lw      ra,12(sp)
   20040:       00812403                lw      s0,8(sp)
   20044:       01010113                addi    sp,sp,16
   20048:       00008067                ret

0002004c <breathe>:
   2004c:       ff010113                addi    sp,sp,-16
   20050:       00112623                sw      ra,12(sp)
   20054:       00812423                sw      s0,8(sp)
   20058:       00912223                sw      s1,4(sp)
   2005c:       01212023                sw      s2,0(sp)
   20060:       00050493                mv      s1,a0
   20064:       0ff00413                li      s0,255
   20068:       fff00913                li      s2,-1
   2006c:       00040593                mv      a1,s0
   20070:       00048513                mv      a0,s1
   20074:       f95ff0ef                jal     20008 <led_set_gamma>
   20078:       fff40413                addi    s0,s0,-1
   2007c:       ff2418e3                bne     s0,s2,2006c <breathe+0x20>
   20080:       00000413                li      s0,0
   20084:       10000913                li      s2,256
   20088:       00040593                mv      a1,s0
   2008c:       00048513                mv      a0,s1
   20090:       f79ff0ef                jal     20008 <led_set_gamma>
   20094:       00140413                addi    s0,s0,1
   20098:       ff2418e3                bne     s0,s2,20088 <breathe+0x3c>
   2009c:       00c12083                lw      ra,12(sp)
   200a0:       00812403                lw      s0,8(sp)
   200a4:       00412483                lw      s1,4(sp)
   200a8:       00012903                lw      s2,0(sp)
   200ac:       01010113                addi    sp,sp,16
   200b0:       00008067                ret

000200b4 <main>:
   200b4:       ff010113                addi    sp,sp,-16
   200b8:       00112623                sw      ra,12(sp)
   200bc:       0ff00713                li      a4,255
   200c0:       000107b7                lui     a5,0x10
   200c4:       00e7a023                sw      a4,0(a5) # 10000 <_bss_end+0x10000>
   200c8:       00e7a223                sw      a4,4(a5)
   200cc:       000107b7                lui     a5,0x10
   200d0:       00e7a423                sw      a4,8(a5) # 10008 <_bss_end+0x10008>
   200d4:       00000513                li      a0,0
   200d8:       f75ff0ef                jal     2004c <breathe>
   200dc:       00400513                li      a0,4
   200e0:       f6dff0ef                jal     2004c <breathe>
   200e4:       00800513                li      a0,8
   200e8:       f65ff0ef                jal     2004c <breathe>
   200ec:       fe9ff06f                j       200d4 <main+0x20>

000200f0 <__mulsi3>:
   200f0:       00050613                mv      a2,a0
   200f4:       00000513                li      a0,0
   200f8:       0015f693                andi    a3,a1,1
   200fc:       00068463                beqz    a3,20104 <__mulsi3+0x14>
   20100:       00c50533                add     a0,a0,a2
   20104:       0015d593                srli    a1,a1,0x1
   20108:       00161613                slli    a2,a2,0x1
   2010c:       fe0596e3                bnez    a1,200f8 <__mulsi3+0x8>
   20110:       00008067                ret

Is something obviously wrong here? Any help appreciated. cvrisc_read_data.vcd.zip

[Dolu1990]

Hi,

Here i can see a violation, a ibus rsp comming without the cmd having fired :

Did you configured the ibus cmd fork to be persistant ? https://github.com/SpinalHDL/VexRiscv/blob/457ae5c7e5c8183f0ba7c51f7f0301d05eb8ced1/src/main/scala/vexriscv/plugin/IBusSimplePlugin.scala#L225

[MrJake222]

Did you configured the ibus cmd fork to be persistant ?

Thank you. I've set it to persistent now and the issue is fixed. Now i see the docs saying it's risky and widely unsupported. I question why is it set in demos then?

[Dolu1990]

The reason was that those demo were designed to be as small as possible in terms of ressources. Non persistant instruction cmd allow to avoid some "expensive" buffers.