issues
search
SpinalHDL
/
VexRiscv
A FPGA friendly 32 bit RISC-V CPU implementation
MIT License
2.51k
stars
420
forks
source link
Congratulations for winning 1st place of SoftCPU contest!
#45
Open
drom
opened
5 years ago
drom
commented
5 years ago
:tada:
https://twitter.com/risc_v/status/1070389876900679680
Dolu1990
commented
5 years ago
Thanks :)
:tada: https://twitter.com/risc_v/status/1070389876900679680