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SpinalHDL / VexiiRiscv

Like VexRiscv, but, Harder, Better, Faster, Stronger
MIT License
63 stars 7 forks source link

Run a simple bare metal program? #9

Open nachiket opened 3 months ago

nachiket commented 3 months ago

Is this a better repo to use for simple experiments than the original?

I see there's a pointer to running the ELF simulation at this URL: https://spinalhdl.github.io/VexiiRiscv-RTD/master/VexiiRiscv/HowToUse/index.html

How/where do I supply my own code to generate an ELF for functional and performance evaluation?

Dolu1990 commented 3 months ago

Is this a better repo to use for simple experiments than the original?

original meaning VexRiscv ? It is probably a bit early if you think about FPGA / SoC, but for raw CPU simulation, i think it is good.

I would say here : ext/NaxSoftware/baremetal you can add a new "project" there, then cd your project and "make rv32ima" for instance

note that by default, most option / optimization for the CPU architecture are disabled.