Garnet Testing Tasks

[Kuree]

Top level tasks

• [ ] CGRA Fabric (Keyi)
  • [x] Stall network (Keyi)
  • [x] Simple test (line buffer stops all execution in beginning, starts, and completes)
  • [x] Stall in middle of execution
  • [ ] PE (Ross). The detail of testing should refer to https://github.com/StanfordAHA/lassen/issues/98
  • [ ] Floating point apps
  • [ ] Complex Ops
  • [x] Memory tile (Max)
  • [x] Interconnect (Keyi)
  • [x] CB
  • [x] SB with pipeline registers
  • [x] Interconnect configurations
  • [ ] Power domain (Ankita)
  • [ ] Power switching simulation in ncsim with actual bitstream
  • [ ] Gate-level simulation on the entire CGRA fabric
  • [ ] Global Buffer + Global Controller (Taeyoung)
  • [ ] Use simple apps to flush out the testing infrastructure. We need AXI-based interface for this test
  • [ ] Use existing verilator-based JTAG controller (from Jade's TBG) to test out the JTAG interface. This should have the same functionality as the AXI one
• [ ] Entire CGRA Sub-system (Keyi)
  • [ ] Fully tested AXI and JTAG. This is to get ready to interface with the process as a SoC subsystem.
  • [x] Refactor the GarnetFlow so that it can be re-used in the final end-to-end tests.
  • [x] Read/write all registers in interconnect. (Teguh)

[hofstee]

End to end application testing (Teguh)

• [ ] Move testing from garnet to GarnetFlow
• [ ] Pointwise
• [x] Conv_1_2
• [ ] Conv_3_3
• [ ] Camera Pipeline

[Kuree]

Gate level tests

• [ ] MEM/PE tile tests
  • [ ] LB
  • [ ] SRAM
• [ ] PE:
  • [ ] Individual ops
  • [ ] IC routes
• [ ] Reset
• [ ] Stall

[steveri]

I changed the format of the task lists a bit to enable coherent auto scraping... :) -SR