StanfordAHA / Halide-to-Hardware

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Camera pipeline compute is malformed? #100

Closed dillonhuff closed 3 years ago

dillonhuff commented 3 years ago

@jeffsetter I cannot get the coreir backend to load the current camera pipeline compute:

When I check the file at the command line I get:

./coreir/bin/coreir --load_libs commonlib --input ./coreir_compute/camera_pipeline_compute.json --output camera_pipeline_compute.v --passes rungenerators;flattentypes;verilog 
ERROR: {hcompute_curved_stencil}.curve$1.clk Is not fully connected (N)
{hcompute_curved_stencil}.curve$1 Is not fully connected (R)

ERROR: {hcompute_curved_stencil}.curve$1.clk Is not fully connected (N)
{hcompute_curved_stencil}.curve$1 Is not fully connected (R)

I AM DYING!

Any idea whats going wrong here?

jeffsetter commented 3 years ago

It seems like the clock signal is not connected. That should happen in the mapper or something, since I haven't connected the clock signal in my compiler before.

dillonhuff commented 3 years ago

@jeffsetter thanks Jeff! I've fixed the issue.