vcvtps2ph fails SpreadsheetReadWriteSetFuzzTest

[stefanheule]

It seems that in the test, the sandbox computes the lower 128 bits correctly, but leaves the upper bits unchanged, instead of setting them to 0. When I try to run the very same state and same instruction locally with the sandbox, it works correctly (the upper bits are correctly set to 0).

Huh?

Full output of the fuzz tester:

[----------] * vcvtps2ph $0x80, %xmm9, %xmm4 # OPC=vcvtps2ph_xmm_xmm_imm8

SpreadsheetReadWriteSetFuzzTest Failed!

Instruction: vcvtps2ph $0x80, %xmm9, %xmm4
  Maybe read set:  { %xmm9 %mxcsr::rc[0] }
  Must read set:   { %xmm9 %mxcsr::rc[0] }
  Maybe write set: { %ymm4 }
  Must write set:  { %ymm4 }
  Maybe undef set: { }
  Must undef set:  { }

Bits 128..192 of %ymm4 differ.
  In state 1: 0x87e7c6dae1d4f754
  In state 2: 0x24fa824ab977b052
Bits 192..256 of %ymm4 differ.
  In state 1: 0x920a3dbdb7f6744b
  In state 2: 0x80fbb70b7e195ef8

State 1:

SIGNAL 0 [normal exit]

%rax     f7 ae 85 a1 a2 af 03 e6
%rcx     3f be 73 7b 37 12 a0 31
%rdx     6f a7 a1 69 45 47 bf b0
%rbx     2e 9e 7f 5e 6c 21 e2 71
%rsp     00 00 00 07 00 00 00 00
%rbp     03 19 06 48 35 a1 97 48
%rsi     40 2f 19 a7 b0 93 0a 94
%rdi     8f 4b 46 65 2d 25 3c fc
%r8      f5 ba e7 31 df 35 28 0f
%r9      d7 92 b5 6f 1d d1 d3 4f
%r10     93 0a 5e 4d 94 58 ea 66
%r11     48 0d 6a ac 27 f9 02 91
%r12     07 8c d1 6a c7 d4 e8 54
%r13     82 15 ee ba c8 dd cd dd
%r14     91 0a be 13 b2 60 34 2a
%r15     a1 f6 d4 5f 8f a2 d3 b1

%ymm0    47 cb fd 26 9c c9 78 c4 1e 53 38 78 97 d4 5d 44 ee 95 b7 c2 91 10 aa 15 d9 d8 4a 14 ef e3 4b 97
%ymm1    88 5b 0b 1a 65 ae 1d 80 7e c6 c8 4c 86 07 c9 69 6e 73 50 5f dc d4 bd d1 72 b3 fb 60 b8 de 69 1b
%ymm2    d0 98 50 bb 04 e8 7b 80 ff 2d b4 3d aa 99 fc 77 a6 d2 9e 44 64 3f 7d 78 c7 34 d9 17 92 bf aa ce
%ymm3    f6 4a 4d 93 42 b1 eb d2 8b ef 4a ec 6f 3c ee 80 a3 e2 2d b2 d6 ce df cf 84 16 b2 3f 4d 54 b1 15
%ymm4    92 0a 3d bd b7 f6 74 4b 87 e7 c6 da e1 d4 f7 54 bf b6 93 ff 0e f3 c2 8b ef 9a d4 82 75 d2 78 71
%ymm5    4a 7e eb 43 c9 12 03 db 94 fe dd a7 37 d9 dc d3 27 4f 58 57 a8 82 bf 47 a2 f8 3d 4d e6 17 05 cc
%ymm6    49 a8 da f5 a0 1b 13 2f 7b d5 11 c3 17 e7 fa 37 4a 96 0f 39 4d e2 ab d7 a0 b0 d9 1e 7d 66 97 a2
%ymm7    e4 55 14 9e 0d c8 55 73 0d 46 ed 4c c6 e2 51 52 d6 3d da af d0 9d 4e 05 75 08 1e b0 18 ab 69 90
%ymm8    2c 07 ad 90 77 a9 b0 23 37 fd 6b d3 49 ba c5 21 0b 03 22 87 65 da 2a b9 d6 46 19 15 dd 78 3f 3b
%ymm9    2e fc 08 1d c7 83 6a b2 07 5b ed e9 0c 24 87 a0 3f 87 30 ad 51 79 31 e5 65 d5 4d 1a 2c 97 c1 ea
%ymm10   1c cf c7 0f 03 26 16 4c 3d 28 5c 07 b9 c2 53 d5 d3 18 e0 ff 01 c0 d5 83 e0 7b 3e df 0c a0 cb 40
%ymm11   7b c0 e5 29 74 66 23 31 39 ed 66 a5 bd a8 87 fc de 51 8c f6 89 1d 38 07 f8 df 7c 28 26 da 81 fb
%ymm12   8c ec 49 31 1b dc bf 87 f2 6b 18 cb 3c 8f 23 48 89 61 d8 6a e2 b6 a4 37 1c 6b 8c d7 8e 06 ac 20
%ymm13   d1 61 3f dd 71 bc 0a 06 d2 fe c0 57 3c 3e 18 f0 0c d6 f5 8e 1d 0d 12 6e 3a 4b b9 1b f0 cc 0d 96
%ymm14   b4 55 c0 02 52 fd c6 47 d2 21 a1 92 12 49 db 86 0e a4 4a 85 a9 22 ac e4 bc ab 84 42 22 33 56 7a
%ymm15   48 db 03 17 4f c4 a4 36 14 1c ed f5 23 ea f3 28 88 b7 c8 3f 23 5a ce 9e b4 e3 32 1c ce 03 07 f9

%cf      0 
%1       1 
%pf      1 
%0       0 
%af      1 
%0       0 
%zf      0 
%sf      0 
%tf      0 
%if      1 
%df      0 
%of      0 
%iopl[0] 0 
%iopl[1] 0 
%nt      0 
%0       0 
%rf      0 
%vm      0 
%ac      0 
%vif     0 
%vip     0 
%id      0 

[ 00000007 00000000 - 00000006 ffffffe0 ]
[ 4 valid rows shown ]

00000006 fffffff8   v v v v v v v v   71 ee 5f 4d 47 e3 6a 06 
00000006 fffffff0   v v v v v v v v   e1 c3 7c 7c 7b 89 1e 49 
00000006 ffffffe8   v v v v v v v v   6f e9 77 6e ec 8d d8 25 
00000006 ffffffe0   v v v v v v v v   83 14 08 b0 35 72 ed a5 

[ 00000001 00000000 - 00000001 00000000 ]
[ 0 valid rows shown ]

[ 00000000 00000000 - 00000000 00000000 ]
[ 0 valid rows shown ]

0 more segment(s)

State 2:

SIGNAL 0 [normal exit]

%rax     a6 3b 27 fb 5a 9c 00 1a
%rcx     49 c6 83 d8 7a 83 2a 1d
%rdx     7f 92 ce 1b 5d 12 62 60
%rbx     42 a6 44 62 67 bc 81 40
%rsp     00 00 00 07 00 00 00 00
%rbp     47 a1 97 b3 9f 39 5a 07
%rsi     00 a7 ce f7 fc 55 51 c7
%rdi     f3 89 37 5f 23 ce 3e dd
%r8      c8 f3 9f 40 7d 18 5b 9b
%r9      77 aa f5 c8 1d 8d d9 35
%r10     9d c7 a3 aa 09 8e d4 70
%r11     ed 90 b1 c4 be 7e e4 c2
%r12     20 f2 3b 0b 78 d1 9f 1a
%r13     ba 6a 9d 58 ad f5 12 16
%r14     f5 91 4f 15 0f f0 a9 92
%r15     c1 0f 9a 61 8c 49 0c 57

%ymm0    aa 18 34 35 e7 8c 68 11 fa 93 5d ad b4 c8 d1 26 95 3d 13 02 b6 bb d6 b7 80 20 12 6c f6 fe ca b8
%ymm1    53 66 e5 63 ab 38 18 2f 31 1c 3e 08 51 24 6e f8 a5 1f ea b2 ce dc da d6 83 01 36 1f 00 61 67 12
%ymm2    8d 9b 25 81 06 ba 2a bd 0b e8 ce 83 cc e3 65 4b 0f 1d 0d bf 8e 55 35 f3 57 4f 50 a1 2b 0d 0d 69
%ymm3    4a 4f d2 29 ff 1a 84 11 81 79 7b dd 57 47 8f 1e 20 3f 21 11 1a fa 88 85 f7 22 12 99 09 b0 ea c0
%ymm4    80 fb b7 0b 7e 19 5e f8 24 fa 82 4a b9 77 b0 52 0d 3d 39 82 59 35 16 b1 87 a6 59 c4 96 ea ce bc
%ymm5    81 cf 0b ff 68 17 52 a2 07 ed df f8 09 b0 9d 62 51 7b d8 fd ec a3 f1 87 58 98 33 de a9 8e 92 b7
%ymm6    5c 6a 64 4b e4 0c e2 1c 78 14 7b 9c 4c 95 44 3b e1 df 95 e1 54 af 3b 46 2f 9e 87 c9 b6 6c 36 14
%ymm7    ff 53 9d 22 f2 45 71 48 79 f5 ad 9f 38 d9 9f 98 e7 c1 91 ec cd be b9 d2 20 66 9c 6b 68 6c 44 0e
%ymm8    e1 a2 15 2e e2 f2 33 be 00 c6 17 f2 3f 24 ee e2 72 85 d9 48 01 09 f1 d5 03 0a 36 92 7f 34 df 5b
%ymm9    64 2f d6 7f 81 4f 9d 78 6e fa 32 47 c9 f6 23 31 3f 87 30 ad 51 79 31 e5 65 d5 4d 1a 2c 97 c1 ea
%ymm10   a6 d8 af 52 0d 9e 99 ce 8e c1 15 e8 ce ed 68 e0 57 a5 c6 0d 12 d9 fc 66 50 c9 ee f2 f1 2a 18 a6
%ymm11   11 17 ee c4 7a e0 00 2f e5 91 45 bd b4 8e 16 30 96 0d ba 3d f8 08 ef 0a 63 d5 28 96 2c e5 ca a9
%ymm12   24 3a cf a1 a8 9e 87 12 db ba cf 64 f2 de da 23 d5 56 d7 fa eb 9e 91 5e 1b 57 23 3f fb a4 21 8f
%ymm13   a5 aa bd 11 00 b3 f4 96 27 6b 6f 1c 9c 21 bc de 9b 27 55 53 d9 04 2f 36 d6 66 2c 74 61 11 1d c9
%ymm14   23 0d 4c 88 bf af 9d d0 c9 a0 fc ce 8a 97 68 b9 49 b7 ec b1 97 db 78 df 7a c6 c9 48 12 8b d4 79
%ymm15   b4 65 fc 7d 71 4f bf 95 f8 af f6 55 de 0f b4 17 2a a6 2a 2c 0f db 98 54 aa 35 2b 28 95 19 ee b1

%cf      1 
%1       1 
%pf      0 
%0       0 
%af      1 
%0       0 
%zf      1 
%sf      0 
%tf      0 
%if      1 
%df      0 
%of      0 
%iopl[0] 0 
%iopl[1] 0 
%nt      0 
%0       0 
%rf      0 
%vm      0 
%ac      0 
%vif     0 
%vip     0 
%id      0 

[ 00000007 00000000 - 00000006 ffffffe0 ]
[ 4 valid rows shown ]

00000006 fffffff8   v v v v v v v v   71 ee 5f 4d 47 e3 6a 06 
00000006 fffffff0   v v v v v v v v   e1 c3 7c 7c 7b 89 1e 49 
00000006 ffffffe8   v v v v v v v v   6f e9 77 6e ec 8d d8 25 
00000006 ffffffe0   v v v v v v v v   83 14 08 b0 35 72 ed a5 

[ 00000001 00000000 - 00000001 00000000 ]
[ 0 valid rows shown ]

[ 00000000 00000000 - 00000000 00000000 ]
[ 0 valid rows shown ]

0 more segment(s)

Final State 1:

SIGNAL 0 [normal exit]

%rax     f7 ae 85 a1 a2 af 03 e6
%rcx     3f be 73 7b 37 12 a0 31
%rdx     6f a7 a1 69 45 47 bf b0
%rbx     2e 9e 7f 5e 6c 21 e2 71
%rsp     00 00 00 07 00 00 00 00
%rbp     03 19 06 48 35 a1 97 48
%rsi     40 2f 19 a7 b0 93 0a 94
%rdi     8f 4b 46 65 2d 25 3c fc
%r8      f5 ba e7 31 df 35 28 0f
%r9      d7 92 b5 6f 1d d1 d3 4f
%r10     93 0a 5e 4d 94 58 ea 66
%r11     48 0d 6a ac 27 f9 02 91
%r12     07 8c d1 6a c7 d4 e8 54
%r13     82 15 ee ba c8 dd cd dd
%r14     91 0a be 13 b2 60 34 2a
%r15     a1 f6 d4 5f 8f a2 d3 b1

%ymm0    47 cb fd 26 9c c9 78 c4 1e 53 38 78 97 d4 5d 44 ee 95 b7 c2 91 10 aa 15 d9 d8 4a 14 ef e3 4b 97
%ymm1    88 5b 0b 1a 65 ae 1d 80 7e c6 c8 4c 86 07 c9 69 6e 73 50 5f dc d4 bd d1 72 b3 fb 60 b8 de 69 1b
%ymm2    d0 98 50 bb 04 e8 7b 80 ff 2d b4 3d aa 99 fc 77 a6 d2 9e 44 64 3f 7d 78 c7 34 d9 17 92 bf aa ce
%ymm3    f6 4a 4d 93 42 b1 eb d2 8b ef 4a ec 6f 3c ee 80 a3 e2 2d b2 d6 ce df cf 84 16 b2 3f 4d 54 b1 15
%ymm4    92 0a 3d bd b7 f6 74 4b 87 e7 c6 da e1 d4 f7 54 00 00 00 00 00 00 00 00 3c 3a 7c 00 7c 00 00 00
%ymm5    4a 7e eb 43 c9 12 03 db 94 fe dd a7 37 d9 dc d3 27 4f 58 57 a8 82 bf 47 a2 f8 3d 4d e6 17 05 cc
%ymm6    49 a8 da f5 a0 1b 13 2f 7b d5 11 c3 17 e7 fa 37 4a 96 0f 39 4d e2 ab d7 a0 b0 d9 1e 7d 66 97 a2
%ymm7    e4 55 14 9e 0d c8 55 73 0d 46 ed 4c c6 e2 51 52 d6 3d da af d0 9d 4e 05 75 08 1e b0 18 ab 69 90
%ymm8    2c 07 ad 90 77 a9 b0 23 37 fd 6b d3 49 ba c5 21 0b 03 22 87 65 da 2a b9 d6 46 19 15 dd 78 3f 3b
%ymm9    2e fc 08 1d c7 83 6a b2 07 5b ed e9 0c 24 87 a0 3f 87 30 ad 51 79 31 e5 65 d5 4d 1a 2c 97 c1 ea
%ymm10   1c cf c7 0f 03 26 16 4c 3d 28 5c 07 b9 c2 53 d5 d3 18 e0 ff 01 c0 d5 83 e0 7b 3e df 0c a0 cb 40
%ymm11   7b c0 e5 29 74 66 23 31 39 ed 66 a5 bd a8 87 fc de 51 8c f6 89 1d 38 07 f8 df 7c 28 26 da 81 fb
%ymm12   8c ec 49 31 1b dc bf 87 f2 6b 18 cb 3c 8f 23 48 89 61 d8 6a e2 b6 a4 37 1c 6b 8c d7 8e 06 ac 20
%ymm13   d1 61 3f dd 71 bc 0a 06 d2 fe c0 57 3c 3e 18 f0 0c d6 f5 8e 1d 0d 12 6e 3a 4b b9 1b f0 cc 0d 96
%ymm14   b4 55 c0 02 52 fd c6 47 d2 21 a1 92 12 49 db 86 0e a4 4a 85 a9 22 ac e4 bc ab 84 42 22 33 56 7a
%ymm15   48 db 03 17 4f c4 a4 36 14 1c ed f5 23 ea f3 28 88 b7 c8 3f 23 5a ce 9e b4 e3 32 1c ce 03 07 f9

%cf      0 
%1       1 
%pf      1 
%0       0 
%af      1 
%0       0 
%zf      0 
%sf      0 
%tf      0 
%if      1 
%df      0 
%of      0 
%iopl[0] 0 
%iopl[1] 0 
%nt      0 
%0       0 
%rf      0 
%vm      0 
%ac      0 
%vif     0 
%vip     0 
%id      0 

[ 00000007 00000000 - 00000006 ffffffe0 ]
[ 4 valid rows shown ]

00000006 fffffff8   v v v v v v v v   71 ee 5f 4d 47 e3 6a 06 
00000006 fffffff0   v v v v v v v v   e1 c3 7c 7c 7b 89 1e 49 
00000006 ffffffe8   v v v v v v v v   6f e9 77 6e ec 8d d8 25 
00000006 ffffffe0   v v v v v v v v   83 14 08 b0 35 72 ed a5 

[ 00000001 00000000 - 00000001 00000000 ]
[ 0 valid rows shown ]

[ 00000000 00000000 - 00000000 00000000 ]
[ 0 valid rows shown ]

0 more segment(s)

Final State 2:

SIGNAL 0 [normal exit]

%rax     a6 3b 27 fb 5a 9c 00 1a
%rcx     49 c6 83 d8 7a 83 2a 1d
%rdx     7f 92 ce 1b 5d 12 62 60
%rbx     42 a6 44 62 67 bc 81 40
%rsp     00 00 00 07 00 00 00 00
%rbp     47 a1 97 b3 9f 39 5a 07
%rsi     00 a7 ce f7 fc 55 51 c7
%rdi     f3 89 37 5f 23 ce 3e dd
%r8      c8 f3 9f 40 7d 18 5b 9b
%r9      77 aa f5 c8 1d 8d d9 35
%r10     9d c7 a3 aa 09 8e d4 70
%r11     ed 90 b1 c4 be 7e e4 c2
%r12     20 f2 3b 0b 78 d1 9f 1a
%r13     ba 6a 9d 58 ad f5 12 16
%r14     f5 91 4f 15 0f f0 a9 92
%r15     c1 0f 9a 61 8c 49 0c 57

%ymm0    aa 18 34 35 e7 8c 68 11 fa 93 5d ad b4 c8 d1 26 95 3d 13 02 b6 bb d6 b7 80 20 12 6c f6 fe ca b8
%ymm1    53 66 e5 63 ab 38 18 2f 31 1c 3e 08 51 24 6e f8 a5 1f ea b2 ce dc da d6 83 01 36 1f 00 61 67 12
%ymm2    8d 9b 25 81 06 ba 2a bd 0b e8 ce 83 cc e3 65 4b 0f 1d 0d bf 8e 55 35 f3 57 4f 50 a1 2b 0d 0d 69
%ymm3    4a 4f d2 29 ff 1a 84 11 81 79 7b dd 57 47 8f 1e 20 3f 21 11 1a fa 88 85 f7 22 12 99 09 b0 ea c0
%ymm4    80 fb b7 0b 7e 19 5e f8 24 fa 82 4a b9 77 b0 52 00 00 00 00 00 00 00 00 3c 3a 7c 00 7c 00 00 00
%ymm5    81 cf 0b ff 68 17 52 a2 07 ed df f8 09 b0 9d 62 51 7b d8 fd ec a3 f1 87 58 98 33 de a9 8e 92 b7
%ymm6    5c 6a 64 4b e4 0c e2 1c 78 14 7b 9c 4c 95 44 3b e1 df 95 e1 54 af 3b 46 2f 9e 87 c9 b6 6c 36 14
%ymm7    ff 53 9d 22 f2 45 71 48 79 f5 ad 9f 38 d9 9f 98 e7 c1 91 ec cd be b9 d2 20 66 9c 6b 68 6c 44 0e
%ymm8    e1 a2 15 2e e2 f2 33 be 00 c6 17 f2 3f 24 ee e2 72 85 d9 48 01 09 f1 d5 03 0a 36 92 7f 34 df 5b
%ymm9    64 2f d6 7f 81 4f 9d 78 6e fa 32 47 c9 f6 23 31 3f 87 30 ad 51 79 31 e5 65 d5 4d 1a 2c 97 c1 ea
%ymm10   a6 d8 af 52 0d 9e 99 ce 8e c1 15 e8 ce ed 68 e0 57 a5 c6 0d 12 d9 fc 66 50 c9 ee f2 f1 2a 18 a6
%ymm11   11 17 ee c4 7a e0 00 2f e5 91 45 bd b4 8e 16 30 96 0d ba 3d f8 08 ef 0a 63 d5 28 96 2c e5 ca a9
%ymm12   24 3a cf a1 a8 9e 87 12 db ba cf 64 f2 de da 23 d5 56 d7 fa eb 9e 91 5e 1b 57 23 3f fb a4 21 8f
%ymm13   a5 aa bd 11 00 b3 f4 96 27 6b 6f 1c 9c 21 bc de 9b 27 55 53 d9 04 2f 36 d6 66 2c 74 61 11 1d c9
%ymm14   23 0d 4c 88 bf af 9d d0 c9 a0 fc ce 8a 97 68 b9 49 b7 ec b1 97 db 78 df 7a c6 c9 48 12 8b d4 79
%ymm15   b4 65 fc 7d 71 4f bf 95 f8 af f6 55 de 0f b4 17 2a a6 2a 2c 0f db 98 54 aa 35 2b 28 95 19 ee b1

%cf      1 
%1       1 
%pf      0 
%0       0 
%af      1 
%0       0 
%zf      1 
%sf      0 
%tf      0 
%if      1 
%df      0 
%of      0 
%iopl[0] 0 
%iopl[1] 0 
%nt      0 
%0       0 
%rf      0 
%vm      0 
%ac      0 
%vif     0 
%vip     0 
%id      0 

[ 00000007 00000000 - 00000006 ffffffe0 ]
[ 4 valid rows shown ]

00000006 fffffff8   v v v v v v v v   71 ee 5f 4d 47 e3 6a 06 
00000006 fffffff0   v v v v v v v v   e1 c3 7c 7c 7b 89 1e 49 
00000006 ffffffe8   v v v v v v v v   6f e9 77 6e ec 8d d8 25 
00000006 ffffffe0   v v v v v v v v   83 14 08 b0 35 72 ed a5 

[ 00000001 00000000 - 00000001 00000000 ]
[ 0 valid rows shown ]

[ 00000000 00000000 - 00000000 00000000 ]
[ 0 valid rows shown ]

0 more segment(s)

[stefanheule]

This test has not been failing before build 239, and that's when @bchurchill merged in a lot of his changes: http://mrwhite.stanford.edu:8080/job/stoke-develop-full/239/ @bchurchill: Anything in those changes that might cause this?

[bchurchill]

Nothing comes to mind. These changes should have been all validator changes.

Thinking back though, almost any time we've had a fuzzer error for just one instruction where the sandbox appeared to have been doing something wrong (be it the validator's fuzzer or otherwise), the culprit has been the assembler most of the time. The sandbox is sometimes the culprit, but rarely so for register-register vector instructions where nothing special is required.

So, perhaps check the assembly of the instructions we're generating against what 'as' generates or check with objdump? Especially check the vex prefix, since that would cause this exact problem.

Berkeley

On 01/08/2016 10:52 AM, Stefan Heule wrote:

This test has not been failing before build 239, and that's when @bchurchill https://github.com/bchurchill merged in a lot of his changes: http://mrwhite.stanford.edu:8080/job/stoke-develop-full/239/ @bchurchill https://github.com/bchurchill: Anything in those changes that might cause this?

— Reply to this email directly or view it on GitHub https://github.com/StanfordPL/stoke/issues/801#issuecomment-170089254.

[stefanheule]

Ok, we have another weird, possibly related test failure:

[----------] 4 tests from ValidatorPcmpeqbTest
[ RUN      ] ValidatorPcmpeqbTest.AllZeros
././tests/validator/common.h:214: Failure
Failed
Sandbox and validator do not agree for 'vpcmpeqb %ymm0, %ymm1, %ymm2' (opcode vpcmpeqb_ymm_ymm_ymm)
  states do not agree for '%ymm2':
    validator: 0xff₈ ∘ (0xff₈ ∘ (0xff₈ ∘ (0xff₈ ∘ (0xff₈ ∘ (0xff₈ ∘ (0xff₈ ∘ (0xff₈ ∘ (0xff₈ ∘ (0xff₈ ∘ (0xff₈ ∘ (0xff₈ ∘ (0xff₈ ∘ (0xff₈ ∘ (0xff₈ ∘ (0xff₈ ∘ (0xff₈ ∘ (0xff₈ ∘ (0xff₈ ∘ (0xff₈ ∘ (0xff₈ ∘ (0xff₈ ∘ (0xff₈ ∘ (0xff₈ ∘ 0xffffffffffffffff₆₄)))))))))))))))))))))))
    sandbox:   0x0₆₄ ∘ 0x0₆₄ ∘ 0xffffffffffffffff₆₄ ∘ 0xffffffffffffffff₆₄

[  FAILED  ] ValidatorPcmpeqbTest.AllZeros (92 ms)
[ RUN      ] ValidatorPcmpeqbTest.OneMatch
././tests/validator/common.h:214: Failure
Failed
Sandbox and validator do not agree for 'vpcmpeqb %ymm0, %ymm1, %ymm2' (opcode vpcmpeqb_ymm_ymm_ymm)
  states do not agree for '%ymm2':
    validator: 0x0₈ ∘ (0x0₈ ∘ (0x0₈ ∘ (0x0₈ ∘ (0x0₈ ∘ (0x0₈ ∘ (0x0₈ ∘ (0x0₈ ∘ (0x0₈ ∘ (0x0₈ ∘ (0x0₈ ∘ (0x0₈ ∘ (0x0₈ ∘ (0x0₈ ∘ (0x0₈ ∘ (0xff₈ ∘ (0x0₈ ∘ (0x0₈ ∘ (0x0₈ ∘ (0x0₈ ∘ (0x0₈ ∘ (0x0₈ ∘ (0x0₈ ∘ (0x0₈ ∘ 0x0₆₄)))))))))))))))))))))))
    sandbox:   0x0₆₄ ∘ 0x0₆₄ ∘ 0x0₆₄ ∘ 0x0₆₄

[  FAILED  ] ValidatorPcmpeqbTest.OneMatch (93 ms)
[ RUN      ] ValidatorPcmpeqbTest.WordMatch
././tests/validator/common.h:214: Failure
Failed
Sandbox and validator do not agree for 'vpcmpeqb %ymm0, %ymm1, %ymm2' (opcode vpcmpeqb_ymm_ymm_ymm)
  states do not agree for '%ymm2':
    validator: 0x0₈ ∘ (0x0₈ ∘ (0x0₈ ∘ (0x0₈ ∘ (0x0₈ ∘ (0x0₈ ∘ (0x0₈ ∘ (0x0₈ ∘ (0x0₈ ∘ (0x0₈ ∘ (0x0₈ ∘ (0x0₈ ∘ (0x0₈ ∘ (0x0₈ ∘ (0xff₈ ∘ (0xff₈ ∘ (0x0₈ ∘ (0x0₈ ∘ (0x0₈ ∘ (0x0₈ ∘ (0x0₈ ∘ (0x0₈ ∘ (0x0₈ ∘ (0x0₈ ∘ 0x0₆₄)))))))))))))))))))))))
    sandbox:   0x0₆₄ ∘ 0x0₆₄ ∘ 0x0₆₄ ∘ 0x0₆₄

[  FAILED  ] ValidatorPcmpeqbTest.WordMatch (92 ms)
[ RUN      ] ValidatorPcmpeqbTest.SeveralMatch
././tests/validator/common.h:214: Failure
Failed
Sandbox and validator do not agree for 'vpcmpeqb %ymm0, %ymm1, %ymm2' (opcode vpcmpeqb_ymm_ymm_ymm)
  states do not agree for '%ymm2':
    validator: 0x0₈ ∘ (0x0₈ ∘ (0xff₈ ∘ (0x0₈ ∘ (0xff₈ ∘ (0x0₈ ∘ (0xff₈ ∘ (0x0₈ ∘ (0x0₈ ∘ (0x0₈ ∘ (0xff₈ ∘ (0x0₈ ∘ (0xff₈ ∘ (0x0₈ ∘ (0xff₈ ∘ (0x0₈ ∘ (0x0₈ ∘ (0x0₈ ∘ (0xff₈ ∘ (0x0₈ ∘ (0xff₈ ∘ (0x0₈ ∘ (0xff₈ ∘ (0x0₈ ∘ 0xff00ff00ff00ff00₆₄)))))))))))))))))))))))
    sandbox:   0x0₆₄ ∘ 0x0₆₄ ∘ 0xff00ff00ff00₆₄ ∘ 0xff00ff00ff00ff00₆₄

[  FAILED  ] ValidatorPcmpeqbTest.SeveralMatch (92 ms)

It seems that again the sandbox is wrong and computes the lower 128 bits correctly, but incorrectly leaves the upper bits unchanged (instead of computing them). Again, I can't reproduce the error locally on mrwhite (the test passes).

It seems that this might be something serious and we need to find the cause, but I'm not sure how yet as I'm not able to reproduce it.

[stefanheule]

Also, it's not the assembler: It spits out the same bits as gcc does.

[bchurchill]

I think I know what's happening.

At least for the PcmpeqbTest, these are being run as part of nehalem_test. On a real Nehalem machine, we would crash. On mrwhite, the instructions get run fine, but the sandbox ignores the ymm registers because it figures they wouldn't exist on Nehalem.

The failure in Jenkins build 246 on X64AsmTest.SpreadsheetReadWriteSetFuzzTest is also Nehalem test. So, that's the likely culprit.

I think this is essentially a duplicate of #714 (in that, the bugs we're finding are specific to Nehalem/Sandy Bridge platform)

[bchurchill]

and, of course, if you're not building nehalem_test, you wouldn't be able to reproduce these.

[stefanheule]

Oh, I see. Sounds like we need to fix the tests, then.

[bchurchill]

Would you be willing to do that? It's hopefully just #def'ing something.

[stefanheule]

I think I fixed both problems. For the first one, we did not remove a CPU flag in the nehalem build that isn't available on nehalem. For the second one, I excluded the test using a #ifndef.

Not entirely sure why these failures didn't show up earlier.