Closed sjkim85 closed 3 years ago
-QTM of phase_interpolator (for TX) is added -Verilog of V2T is fixed (1b0--> VSS, 1b1-->VDD)
Looks good to me. @sjkim85 I'm happy to approve and merge this if you request my review.
-QTM of phase_interpolator (for TX) is added -Verilog of V2T is fixed (1b0--> VSS, 1b1-->VDD)