StanfordVLSI / dragonphy2

Open Source PHY v2
Apache License 2.0
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Fix TX synthesis bug #150

Closed sgherbst closed 3 years ago

sgherbst commented 3 years ago

Summary

I examined the synthesis output (for FreePDK45) and noticed a big problem -- most of the TX mux and output driver was missing. This PR aims to fix that by applying dont_touch to some nets and cells in the transmitter.

There was also an unrelated problem, where the synthesis tool did not connect termination resistors to the DragonPHY output pins, because the *.lib file for the resistor had all pins marked as input. For now, I marked VinP and VinN as input and Vcm as output (marking all as inout caused a different issue having to do with combo loop detection).

Of course, someone with process access will need to verify these changes on the real process to be used for tapeout, to make sure that these changes fix the problem.

Details

  1. Per feedback from @zamyers: The transition time constraint for 16 GHz outputs of the TX mux is relaxed to 8ps from 6.25ps. In addition, the target clock period is increased from 0.7 ns to 0.9 ns.
  2. I noticed that when set_max_transition was being applied to pins of black boxes (analog core, MDLL, etc.), this caused a warning, and the constraint was not applied. This PR does not solve that problem, but it at least comments out the problematic commands.
  3. It looks like there is still a problem with the tool inserting a buffer after the termination resistor. That will have to be solved in another PR.