This pertains to the MLSD and FFE blocks. Since they have a large number of weight registers, it would take a long time to update each individually over JTAG. Instead the plan is to increment 16 weights at once by amount of -1/0/+1 (each encoded in 2 bits, for a total of 32 bits). We would also want to be able to read/write individual weights directly (as a backup), so this task entails adding some registers that control access to MLSD and FFE weights, along with the logic that implements the controls.
This pertains to the MLSD and FFE blocks. Since they have a large number of weight registers, it would take a long time to update each individually over JTAG. Instead the plan is to increment 16 weights at once by amount of -1/0/+1 (each encoded in 2 bits, for a total of 32 bits). We would also want to be able to read/write individual weights directly (as a backup), so this task entails adding some registers that control access to MLSD and FFE weights, along with the logic that implements the controls.