Add basic test for MDLL

[sgherbst]

This PR resolves #93 by running a basic test on the MDLL -- an external clock is fed into the reference clock pins for the MDLL, the various signals are asserted / de-asserted to get the MDLL output clock selected as the source for analog_core and sent out through an output buffer in digital_core.

I think the main interesting thing here is that this is effectively a record of the steps that have to be taken to use the MDLL. Hopefully that's useful for lab testing.

// enable buffer for reference clock
`FORCE_ADBG(disable_ibuf_mdll_ref, 0);
// Take the MDLL out of reset and enable the oscillator
`FORCE_MDBG(rstn_jtag, 1);
`FORCE_MDBG(en_osc_jtag, 1);
// Use the MDLL clock in the analog core
`FORCE_ADBG(sel_clk_source, 1);
// Bypass the initial divide-by-two in the analog core
`FORCE_ADBG(bypass_inbuf_div2, 1);

[codecov-io]

Codecov Report

Merging #94 into master will not change coverage. The diff coverage is n/a.

@@           Coverage Diff           @@
##           master      #94   +/-   ##
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  Coverage   22.26%   22.26%           
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  Files          33       33           
  Lines        1909     1909           
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  Hits          425      425           
  Misses       1484     1484           

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