Closed kaeferfreund closed 7 years ago
Each instruction at 80MHz CPU clock takes 12.5ns, so 200ns is 16 clocks, i.e. 16 instructions in best case. Clearing and setting any GPIOs has a latency of 6 clocks each (CPU design limitation), which leaves 4 instructions for fetching the settings of the next PWM "step". Also the timer is running in "Divide by 16" mode, i.e. 200ns.
A finer granularity is not useful - there is some spurious jitter of the same magnitude, and if you e.g. switch some mosfets, rise/fall times will vary by several 10ns depending on your power supply stability.
NMI and compat mode are unrelated, but you should avoid compat mode if possible, as it lowers the resolution to 1000ns.
Hi,
just wondering about two things:
Thx in advance