Implement optional overclock for the 68000

[TurBoss]

Hello,

This modifications allows to overclock the MEGADRIVE 68000

COMBO-KEYS

START + B + A rises 0.5Mhz step START + B + C downs 0.5Mhz step

From 8Mhz to 12.5Mhz

It works pretty well in a PAL MODEL 1600-18 not so well in PAL MODEL 1601-18 (Very unstable)

Hardware:

requires one external SPI function genrator

this one AD9833 with 25Mhz reference frequency or this one

AD9834 with 75Mhz reference frequency also others could work

(changing the reference frequency in code is required)

GAMES

Games now run at the same speed but no more slowdown with many sprites on screen

games tested:

Street of rage 1, 2 & 3 Out Run Super Hang ON Sonic 1, 2 & 3 Aladin Comix Zone Dynamite Headdy Gould'n Ghosts Gunstar Heroes Marble Land Rocket Kinight Adventures Megaman Sparkster Subterranea Street Fighter 2 Turbo Toe Jam & Earl Thunder Force 3 Ristar Contra Hard Corps Castlevania Blood Line Castle of Ilusion Bubsy

Thanks

[SukkoPera]

Thanks for your contribution, @TurBoss. Unfortunately, after a lot of thought, I decided not to merge this PR, as I feel it addresses a pretty specific need that will probably be of interest to a few people only.

Although, I have added a note to the README pointing to your fork, so I encourage you to go on with the development :).

[TurBoss]

Hello,

As you said is a bit specific, I agree with you I can keep my fork for this

Thank you

[DieSkaarj]

Hi @TurBoss,

I am trying to implement your overclock branch of the MegaDrivePlusPlus mod. I have an AD9833 but I am not sure how to wire it to the a Mega Drive II board. Would you be able to shed some light?

Thanks, David

[TurBoss]

Hello,

I'm not sure if it will work on a MD II it only used to work stable on MD 1 (IC BD M5 PAL VA4)

about the wiring the pin 15 of the 68k needs to be de soldered from the PCB and connected to the ad9833 OUT the pin 16 and 17 GND needs to go to AGND and the 17 goes to pause from the Arduino pin 8

16 and 15 doesn't need to be de soldered from the PCB

[DieSkaarj]

Thank you for your quick reply @TurBoss

A' that might explain where I've gone wrong. I yanked the original crystal out and replaced it with the signal generaator. Hah, thanks again! ^.^

[Boomchil]

Hello,

I'm not sure if it will work on a MD II it only used to work stable on MD 1 (IC BD M5 PAL VA4)

about the wiring the pin 15 of the 68k needs to be de soldered from the PCB and connected to the ad9833 OUT the pin 16 and 17 GND needs to go to AGND and the 17 goes to pause from the Arduino pin 8

16 and 15 doesn't need to be de soldered from the PCB

Hi. I'm about to test this mod on a Megadrive 2 and would like some bit of clarification.

You say than pin 15 needs to be desoldered (this I understand, so we don't have the board frequency), then you said "16 and 15 doesn't need to be de soldered from the PCB". Do you mean 16 and 17 ?

Then you say that 16 (GND) and 17 (HALT) needs to be soldered to AGND. Wouldn't it cause the CPU to be in permanent Halt state ?

Some other questions : you set the original frequency to 9Mhz, so the console always boots overclocked. I've that some games won't boot correctly, did you have any problem ?

I've read that AD9850 generates a cleaner signal, do you think it would be more stable on other Megadrive revisions ?

Thank you for your work and your answers :)

[DieSkaarj]

Hi @Boomchil

I am confused about this too. I used pin 19 to halt the CPU; According to overclocking diagrams that use a crystal and a switch on MDII and pin 19 works on test. Without a scope I cannot determine what is happening with the frequency. But, I believe that the AD9833 needs powered through VCC and DGND too. While AGND should be connected to either pin16 or pin17 (or pin 56/57 if you want to be hardcore,) on the CPU of the Mega Drive.

I hope this helps get it figured.

[TurBoss]

ops looks like I was wrong

[DieSkaarj]

This is the revision in the Mega Drive II.

[DieSkaarj]

Hi @Boomchil,

I've successfully managed to use the AD9833 to overclock a Mega Drive II. However, I used a mh-attiny88 (and my own code.)

The pinout I used was:

vcc <- MD II dgnd -> MD II sdata <-> mosi (Device) sclk <-> sck (Device) fsync <-> ss (Device) agnd <-> p57 (68HC000) out <-> p15 (68HC000)

The performance wasn't very good. It seems to start showing signs of failure around 8Mhz. It might be an idea to clean the signal with 10uf+100nf caps in parallel to Out and Agnd.