enable inference for RAMB36E1

SymbiFlow / yosys

SymbiFlow WIP changes for Yosys Open SYnthesis Suite

http://www.clifford.at/yosys/

ISC License

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enable inference for RAMB36E1 #31

Closed HackerFoo closed 4 years ago

HackerFoo commented 5 years ago

I'm going to put off adding support for 8/16/32-bit widths for later, since it's not trivial and not needed right now.

@litghost What value do you suggest for min bits?

litghost commented 5 years ago

@litghost What value do you suggest for min bits?

Let's leave it alone.

litghost commented 5 years ago

Have you tested the relevant circuits in symbiflow? E.g. murax, picosoc and scalable proc? Which of these now instance the larger primitive?

litghost commented 5 years ago

@HackerFoo Please report hardware testing status for:

[ ] Scalable proc
[ ] Murax
[ ] Picosoc

HackerFoo commented 5 years ago

I haven't tried scalable proc yet
Murax works, but doesn't use 36k blocks
PicoSoC does use them, but doesn't work with or without them, so I need to find a working configuration.

HackerFoo commented 5 years ago

top_bram_n3 also doesn't work without 36k RAM inference.

rx:'054BB395' pat:'054BB395' V
rx:'06D2F54C' pat:'06D2F54C' V
Got 5 consecutive matches. In sync.
MISMATCH! (rx='4C736D44', pat='A3C391EB'), Sync lost!
rx:'A3C391EB' pat:'A3C391EB' V
rx:'0150BAB0' pat:'0150BAB0' V
rx:'0060ED28' pat:'0060ED28' V
rx:'054BB395' pat:'054BB395' V
rx:'06D2F54C' pat:'06D2F54C' V
Got 5 consecutive matches. In sync.
MISMATCH! (rx='4C736D44', pat='A3C391EB'), Sync lost!
rx:'A3C391EB' pat:'A3C391EB' V
rx:'0150BAB0' pat:'0150BAB0' V

litghost commented 5 years ago

top_bram_n3 also doesn't work without 36k RAM inference.

Does top_bram_n1?

HackerFoo commented 5 years ago

top_bram_n1 fails too.