Branch : Quicklogic : In symbiflow ''ram8k_2x1_cell_macro'' not supported

SymbiFlow / yosys

SymbiFlow WIP changes for Yosys Open SYnthesis Suite

http://www.clifford.at/yosys/

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Branch : Quicklogic : In symbiflow ''ram8k_2x1_cell_macro'' not supported #69

Closed rakeshm75 closed 4 years ago

rakeshm75 commented 4 years ago

When run the attached design through the symbiflow, we get the following error:

Error 1: Type: Blif file File: /home/rakeshm/symbiflow-arch-defs/build/quicklogic/tests/quicklogic_testsuite/design1/design1-ql-chandalar/ql-s3-ql-eos-s3-virt-ql-eos-s3-wlcsp/top.eblif Line: 11551 Message: Failed to find matching architecture model for 'ram8k_2x1_cell_macro' rtl1.zip

kgugala commented 4 years ago

this should be fixed now. Please fetch the latest code and run the tests again. There is also a RAM test included in the repository https://github.com/antmicro/symbiflow-arch-defs/tree/quicklogic-upstream-rebase/quicklogic/tests/ram

GitHub
antmicro/symbiflow-arch-defs
FOSS architecture definitions of FPGA hardware useful for doing PnR device generation. - antmicro/symbiflow-arch-defs

rakeshm75 commented 4 years ago

This issue is fixed, so closing the issue.