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SystemRDL / PeakRDL-uvm

Generate UVM register model from compiled SystemRDL input
GNU General Public License v3.0
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mem access type typo #11

Closed mpriestleyidex closed 2 years ago

mpriestleyidex commented 2 years ago

In exporter.py:

    def _get_mem_access(self, mem: MemNode) -> str:
        sw = mem.get_property("sw")
        if sw == AccessType.r:
            return "R"
        else:
            return "RW"

I think the "R" should be an "RO". Certainly the UVM libraries I'm using think so, though I've not dived into any UVM specifications to find out for certain.

amykyta3 commented 2 years ago

Fixed in v2.0.4. Thanks for finding this!