Systems-Modeling / SysML-v2-Pilot-Implementation

Proof-of-concept pilot implementation of the SysML v2 textual notation and visualization
GNU Lesser General Public License v3.0
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ST6RI-767: Some redefinitions are not correctly rendered (PlantUML) #561

Closed himi closed 7 months ago

himi commented 7 months ago

The changes in PR #558 introduced a bug so that a redefinition whose target is missing may not be correctly rendered. For example,

part p1 {
  part p11;
}
part p2 :> p1 {
  part p21 :>> p11;
}

and %viz --view interconnection p2::p21 renders image So far, redefinitions are handled with inherit key of redefined features, but that does not work well in some cases such as the above. This PR enhances PC (PathContext) to properly handle redefinitions by differentiating the equivalence classes of redefinitions and non-redefinitions. By this enhancement, we can use the same inherit key with non-redefinition cases.

himi commented 7 months ago

I checked this PR with many test cases. For example,

    package Case1 {
        part p1 {
            attribute a11;
        }
        part p2 :> p1 {
            attribute a21 :>> a11 {
                /* comment */
            }
        }
    }
    package Case2 {
        part p1 {
            attribute a11;
        }
        part p2 {
            attribute a21 :>> p1.a11 {
                /* comment */
            }
        }
    }
    package Case3 {
        part p1 {
            attribute a11;
        }
        part p2 :> p1 {
            attribute a21 :>> p1.a11 {
                /* comment */
            }
            attribute a22 = p1.a11;
        }
    }

The result in interconnection view looks like: Screenshot 2024-04-19 at 12 59 43 AM

himi commented 7 months ago

Even if we visualize, for example, Case1::p2::a21 only (the comment is for this purpose in Eclipse), we get: Screenshot 2024-04-19 at 1 01 46 AM This does not render a spurious redefinition.

himi commented 7 months ago

This PR also uses FeatureUtil.getAllRedefinedFeaturesOf() instead of iterating redefined features. It is important to deal with implicit elements. Therefore, we can properly handle

package TestRedefinedFeatures {
    action a0 {
        action a01 {
            out output;
        }
        flow f1 from a01.output to a02.input;
        action a02 {
            in input;
        }
    }

    action a1 :> a0 {
        action :>> a02 {
            in input;
        }
    }
}

The rendered result is:

Screenshot 2024-04-19 at 1 05 53 AM

Previously, we had to explicitly redefine a1.a02.input to correctly render it.