Add support for STM8L101 and STM8L001

[TG9541]

Yes, really. There will be some editing to do in the docs because I frequently stated that it's not possible.

What changed: with the help of OpenOCD (0.10.0+dev-01404-g3934483-dirty), an upgraded cheapo STLINK "V2J35S7 (API v2)" and STM8-GDB (8.1 with stm8-binutils patches)and a recent SDCC (4.0.3) I wasn't only able to flash a device (it never worked for me with stm8flash on Linux) but also to debug it step by step. Findings about the required OpenOCD configuration are here and here.

The new port shall support the following features:

• viable memory layout for 1.5K RAM
• UART for the console
• some kind of anti-lock-out for STM8L001J3M3 (SWIM and TX share the same pin, again, but there is no UART bidirectional "hdx" mode)
• no ADC words (no use for those)
• background task with (at least) TIM2

Bonus:

• A solution for the EEPROM (which is, in fact, a section of the Flash ROM)
• Simulated serial (for substituting the missing UART hdx)

[TG9541]

Some STM8L001J3M3 test results:

• flashing a chip finally worked (it took a change in the OpenOCD target config)
• PC3/USART_TX won't block PA0/SWIM as long as the PC3 PC_DDR and PC_CR1 bits remain in reset state and an external pull-up is used instead
• The simulated serial interface (using TIM4 and GPIO interrupts) works

Since the STM8L USART doesn't support half-duplex mode or GPIO remapping (both are STM8S Low Density features) practical application of this SOP-8 device with 6 GPIOs probably benefit from using some sort of bidirectional UART implementation on pin1.