jamesyoungman
commented
2 years ago This is documented in Chapter 13 of the Technical Manual (in vol 2). Figures 13-12 and 13-13 (pages 13-24 and 13-25) show the effect of load-type and store-type instructions as being different.
In each example we see Permutation 3, with Q3 inactive.
- For the load instruction shifts are to the left (M1->E2, M2 goes nowhere since E3 is inactive, M3->E4, M4->E1).
- For the store instruction shifts are to the right (E1->M4, E2->M1, E3 goes nowhere since Q3 is inactive, so M2 is unchanged, E4->M3).
So it appears that quarter activity refers to the quarters of the E register, whether it is being read from or written to.
According to figure 13-15, sign extension for an 18,18 subword form can occur to the right (from bit 4.9 into all the bits of q3).
Section 13-4.1 (covering loads) says "The sign extension process which follows step 4 is described in 13-4.3.". But section 13-4.2 (covering stores) contains no similar statement. I suspect this means that sign extension does not happen for stores.
Describe the bug The current implementation of the exchange element (
exchanger.rs) is based on the content of table 7-2 in the Users Handbook.But, you compare the examples for config 2 in the descriptions of LDA (page 3-6) and STA (page 3-8) the movement appears to be opposite. See example number 3 in each case.
The existing code appears to match the load case, not the store case. Execution of stores appears to show backward behaviour compared to the examples in the STA documentation.
To Reproduce N/A
Expected behavior I am not 100% clear on this. For example what happens with sign extension and subword form?
Additional context The problem manifested in the intiial implementation of the STE opcode, but so far the boot code only makes use of config value 0 (full word, all quarters active). That probably explains why I did not previously see a problem.