Cannot Find File in Verilog2pexlif

[ElizabethSotomayor]

Hello, I am trying the example that can be found at the end of the brief user guide in which two files small.v and small_lib.v are input and converted to fsm. I have tried switching the location of these files to no avail, as I always get the same error:

I have checked that yosys is correctly installed/included in my path. I am running fl on Ubuntu 23.04.

[ElizabethSotomayor]

I relocated both files and now get this error: yosys not found