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TexasInstruments / edgeai-tidl-tools

Edgeai TIDL Tools and Examples - This repository contains Tools and example developed for Deep learning runtime (DLRT) offering provided by TI’s edge AI solutions.
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Illegal instruction during model convertation #64

Closed Stepdan closed 10 months ago

Stepdan commented 10 months ago

Hi!

I have a next problem with my TDA4VM:

I have installed edgeai-tidl-tools repo in WSL Ubuntu-22.04 (latest release tag). I succesfully launched setup.sh - all dependencies have been downloaded and installed.

I try to launch python scripts (tf and onnx) for models convertation - and got next error:

~~~~~Running TIDL in PC emulation mode to collect Activations range for each layer~~~~~
Processing config file #0 : /home/stepin/edgeai-tidl-tools/model-artifacts/cl-ort-resnet18-v1/tempDir/191_tidl_io_.qunat_stats_config.txt 
Illegal instruction

Also I have this message:

------------------ Network Compiler Traces -----------------------------
successful Memory allocation
TIDL ALLOWLISTING LAYER CHECK: TIDL_E_QUANT_STATS_NOT_AVAILABLE] tidl_quant_stats_tool.out fails to collect dynamic range. Please look into quant stats log. This model will get fault on target.
****************************************************
**          0 WARNINGS          1 ERRORS          **
****************************************************

I got this error for EVERY model (model zoo, my own, etc).

I've read about this error in TIDL User Guide:

Known Issue In some of the old machines, user many observe "Illegal Instruction" error while importing model or performing inference on PC. This is observed because of new x86_64 instruction used in the pre-built binaries. To overcome this, user would need to re-built the TIDL-RT host emulation executable by executing below command

$ cd ${TIDL_INSTALL_PATH} $ make tidl TARGET_PLATFORM=PC

I 've tried to launch this scenario with the same results on next processors:

It's OK for Intel 8600 because it is an old processor but 12700 and 5900HX seems to be a modern ones.

I don't understand what should I do for successful convertation.

Also I tried to rebuild tidl for my own but I don't understand how it should be builded. I download _ti-processor-sdk-rtos-j721e-evm-09_00_0002 but can't build it because it requires SOC which is not equal AM68PA:

/home/stepin/ti-processor-sdk-rtos-j721e-evm-09_00_00_02/sdk_builder/build_flags.mak:74: *** SOC env variable should be set to one of (j721e, j721s2, j784s4, am62a). Stop.

So mu second issue - how should I build it?

Stepdan commented 10 months ago

So we have discussion about this problem here:

https://e2e.ti.com/support/processors-group/processors/f/processors-forum/1267130/tda4vm-illegal-instruction-during-edgeai-tidl-tools-models-compilation-rebuilding-tidl-rt