Closed MaxBanister closed 4 years ago
It’s behavior is correct. Is uses the lowest five bits in the rs2 register. From the RISC-V spec:
“SLL, SRL, and SRA perform logical left, logical right, and arithmetic right shifts on the value in register rs1 by the shift amount held in the lower 5 bits of register rs2.”
It seems that for R-type shift instructions, if rs2 is greater than 31, the shift will actually be circular (not consistently but that's the general behavior).
Minimal example:
li x2, 0xBEEF; li x3, 0x128; sra x2, x2, x3