Provide a Spice model of final circuit that includes parasitics

The-OpenROAD-Project / OpenLane

OpenLane is an automated RTL to GDSII flow based on several components including OpenROAD, Yosys, Magic, Netgen and custom methodology scripts for design exploration and optimization.

https://openlane.readthedocs.io/

Apache License 2.0

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Provide a Spice model of final circuit that includes parasitics #1568

Open growly opened 1 year ago

growly commented 1 year ago

Description

It seems useful to provide a Spice model that includes extracted parasitics at the end of the flow. Proprietary tools readily make this available, and it makes sense to provide the parasitics in a format readily available for the user's simulations.

Proposal

I don't know if existing tools in the flow can do this, but BigSpicy can. It can merge Verilog, Spice and SPEF netlists. It can also do things like

extract capacitively-coupled networks
extract paths between given input/output nodes
flatten the design to the transistor level (for analog designers)

It can easily be run as a (possibly optional) step in the flow to dump the merged Spice view for the user.

Ideally we wouldn't have to export to SPEF and Spice and then re-merge them, but absent another option this does work.

donn commented 1 year ago

Absolutely chuffed that its name is "BigSpicy." We can integrate it, sure, that does sound incredibly useful.

maliberty commented 1 year ago

Most blocks will be far too large to spice. You might find write_path_spice in opensta more useful.

growly commented 1 year ago

I don't agree. Without making any assumptions about what "most" blocks look like, consider that:

Simulators like Xyce are designed to make full-chip simulation feasible
Blocks which do not benefit from large scale Spice simulation do not need to use this feature
Blocks which do benefit will gain greatly from this feature
I have used BigSpicy and Xyce to analyse hardened macros with success (I could simulate one cycle of a floating point multiplier in a couple of minutes on my workstation, and one cycle is all I needed)
Last I checked, write_path_spice did not include parasitics

maliberty commented 1 year ago

If this is useful then great.

write_path_spice does include parastics, otherwise it wouldn't useful. That's not new.

growly commented 1 year ago

My mistake, I misremembered why I couldn’t use write_path_spice. I needed a way to find all nets coupled to a path by some capacitance threshold and it couldn’t give me that, if I recall correctly this time.

It might be better to enable OpenSTA to dump the whole netlist with parasitics? But that would be more work