Closed akhilesh911 closed 1 year ago
@akhilesh911 Which PDK are you using? gf180?
@vijayank88 Yes gf180.
Have you read technology lib/lef before reading your macro lef?
@vijayank88 Yes I have read liberty file using read_lib and it shows as follows openroad> read_liberty pdks/gf180mcuC/libs.ref/gf180mcu_fd_sc_mcu7t5v0/liberty/gf180mcu_fd_sc_mcu7t5v0__tt_025C_5v00.lib 1
Technology lef file have you read or not?
Provide all the steps you tried before you got the error.
@vijayank88 Technology lef is the file on this path, right? [pdks/gf180mcuC/libs.ref/gf180mcu_fd_sc_mcu7t5v0/lef/gf180mcu_fd_sc_mcu7t5v0.lef ] After reading this lef, there shows error of unreferenced site. Can you please tell me if there is something wrong I am doing?
In my macro.lef, there is no SITE name. Site names GF018hv5v_mcu_sc7 are in this file gf180mcu_fd_sc_mcu7t5v0.lef
upload your lef file and steps you tried in script file reproduce the same.
@akhilesh911
You're using d20c7b4 2022-12-13
6 months old commit. Update to latest OpenLane and try again.
This is the lef file of macro. timer.zip
I have followed this steps to read lef: 1) read_liberty pdks/gf180mcuC/libs.ref/gf180mcu_fd_sc_mcu7t5v0/liberty/gf180mcu_fd_sc_mcu7t5v0__tt_025C_5v00.lib 2) read_lef pdks/gf180mcuC/libs.ref/gf180mcu_fd_sc_mcu7t5v0/lef/gf180mcu_fd_sc_mcu7t5v0.lef 3) read_lef designs/macros/lef/timer.lef
@vijayank88 Thank you for your time. I updated openlane and the macro lef is read correctly. But when i tried to read pdks/gf180mcuC/libs.ref/gf180mcu_fd_sc_mcu7t5v0/lef/gf180mcu_fd_sc_mcu7t5v0.lef this file, theere is unknown reference of site GF018hv5v_mcu_sc7. Can you please tell me why is this happening?
@vijayank88 Thank you for your time. I updated openlane and the macro lef is read correctly. But when i tried to read pdks/gf180mcuC/libs.ref/gf180mcu_fd_sc_mcu7t5v0/lef/gf180mcu_fd_sc_mcu7t5v0.lef this file, theere is unknown reference of site GF018hv5v_mcu_sc7. Can you please tell me why is this happening?
You need to read a techlef first libs.ref/gf180mcu_fd_sc_mcu9t5v0/techlef/gf180mcu_fd_sc_mcu9t5v0__nom.tlef
@kareefardi Thank you, I understood. Now the tool is reflecting syntax errors while read_verilog for any verilog file I try to read even when the flow has completed successfully. Is there any solution or is it a bug? Please let me know.
@akhilesh911 can you share the error ?
openroad> read_verilog designs/picosoc/src/picosoc.v [ERROR STA-0164] designs/picosoc/src/picosoc.v line 80, syntax error, unexpected ID, expecting '=' STA-0164 while evaluating {read_verilog designs/picosoc/src/picosoc.v }
And the related line in the verilog code is: parameter integer MEM_WORDS = 256;
@akhilesh911 you can only read a gatelevel netlist (not the src verilog) through OpenROAD app. Can you open a new issue describing what you are trying to do in order to get proper help?
Thank you everyone for your help.
Description
Hello everyone, I am new to OpenLane and I am trying to read LEF and DEF files using OpenLane. After using command read_lef, the LEF file is not getting read by the tool. Please suggest any solutions on how to resolve this issue. Thank you.
Expected Behavior
Successfully read LEF file.
Environment report
Reproduction material
No reproduction material produced.
Relevant log output