d-m-bailey
commented
1 year ago Some things you might want to check.
- Your
FP_PDN_MACRO_HOOKSabove appears truncated, so unfortunately I can not verify everything. Be sure to include a,after every block. eg.block1 VPWR vdd VGND vss, block2 VPWR vdd VGND vss, ... - Here's a definition of the lef port syntax.
PORT Starts a pin port statement that defines a collection of geometries that are electrically equivalent points (strongly connected). A pin can have multiple ports. Each PORT of the same PIN is considered weakly connected to the other PORTs, and should already be connected inside the MACRO (often through a resistive path).
Strongly connected shapes (that is, multiple shapes of one PORT) indicate that a signal router is allowed to connect to one shape of the PORT, and continue routing from another shape of the same PORT.
Weakly connected shapes (that is, separate PORTs of the same PIN) are assumed to be connected through resistive paths inside the MACRO that should not be used by routers. The signal router should connect to one or the other PORT, but not both.
Power routers should connect to every PORT statement, if there is more than one for a given PIN. For example, if a block has several PORTs on the boundary for the VSS PIN, each PORT should be connected by the power router.
So for your power nets, the router may be trying to connect each port of your power nets. From the current lef, this appears to be about a 1000 connects each for vdd and vss.
jacobhaehn
kareefardi
maliberty
Description
I've followed the macro tutorials as closely as possible and have tried various different configurations, but OpenLane always seems to have issues connecting the SRAM22 macros (https://github.com/rahulk29/sram22_sky130_macros) to the PDN. I've been using the following settings (some details left out for brevity):
Here the default VPWR and VGND nets are used and "hooked" to the vdd/vss pins on the SRAMS, but I get an error during PDN generation that all the SRAMs are not connected to the nets in the pdn.log. Same happens if I use vdd/vss as the net names.
I have also tried creating 2 power nets, with
"VDD_NETS": "VPWR vdd", "GND_NETS": "VGND vss",, and this successfully creates two power nets and passes PDN, connecting the SKY130 cells to VPWR/VGND, and connecting the macros to vdd/vss, but then fails at DRC when vdd and vss are shorted together for some reason. Either way, there's no reason to have 2 power nets here.Please let me know if you have any suggestions to try. Thanks!
Expected Behavior
OpenLane doesn't error out in PDN step and properly connects SRAM to the power grid.
Environment report
Reproduction material
For reference, unpackage the files with the following command:
cat sram_pdn_issue_reproducible.* | tar -xzvf -sram_pdn_issue_reproducible.partaa.tar.gz sram_pdn_issue_reproducible.partab.tar.gz sram_pdn_issue_reproducible.partac.tar.gz sram_pdn_issue_reproducible.partad.tar.gz
Relevant log output