This PR renames mem.json file, generated during synth stage, to 1_0_synth_canonical.json, which can be used as synthesis input.
Also, VERILOG_FILES behavior was modified to enable passing JSON files (created with write_json) - read_verilog or read_json is used based on the file extension.
This PR renames
mem.json
file, generated duringsynth
stage, to1_0_synth_canonical.json
, which can be used as synthesis input.Also,
VERILOG_FILES
behavior was modified to enable passing JSON files (created withwrite_json
) -read_verilog
orread_json
is used based on the file extension.