The-OpenROAD-Project / OpenROAD-flow-scripts

OpenROAD's scripts implementing an RTL-to-GDS Flow. Documentation at https://openroad-flow-scripts.readthedocs.io/en/latest/
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PDN Stripe Issue #2270

Closed nchiolino closed 2 months ago

nchiolino commented 2 months ago

Subject

Describe the bug

When running the add_pdn_stripe command for metal-1, the tool either runs stripes under the macro with -followpins or it is missing stripes for standard cells using no -followpins. I cannot get the metal-1 stripes to route through the entire core area but not under the macros.

Expected Behavior

I expect add_pdn_stripe to run metal-1 horizontal stripes through the entire core area but stop at the macros after they are connected.

Environment

[WARNING] Your current OpenROAD version is outdated.

It is recommened to pull the latest changes.

If problem persists, file a github issue with the re-producible test case.

kernel: Linux 6.5.0-44-generic

os: Ubuntu 22.04.4 LTS (Jammy Jellyfish)

cmake version 3.24.2

-- The CXX compiler identification is GNU 11.4.0

-- Detecting CXX compiler ABI info

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-- Check for working CXX compiler: /usr/bin/c++ - skipped

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-- OpenROAD version: v2.0-13893-gf0cc0ee1a

-- System name: Linux

-- Compiler: GNU 11.4.0

-- Build type: RELEASE

-- Install prefix: /usr/local

-- C++ Standard: 17

-- C++ Standard Required: ON

-- C++ Extensions: OFF

-- The C compiler identification is GNU 11.4.0

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-- Check for working C compiler: /usr/bin/cc - skipped

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-- Found Python: /usr/bin/python3.10 (found version "3.10.12") found components: Interpreter 

-- Performing Test CMAKE_HAVE_LIBC_PTHREAD

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-- TCL library: /usr/lib/x86_64-linux-gnu/libtcl.so

-- TCL header: /usr/include/tcl/tcl.h

-- TCL readline library: /usr/lib/x86_64-linux-gnu/libtclreadline.so

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-- Found SWIG: /usr/bin/swig4.0 (found suitable version "4.0.2", minimum required is "4.0")  

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-- boost: 1.80.0

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-- STA version: 2.5.0

-- STA git sha: b71b48ad16590ea7fa144790a2f7ab2ab3d24640

-- System name: Linux

-- Compiler: GNU 11.4.0

-- Build type: RELEASE

-- Build CXX_FLAGS: -O3 -DNDEBUG

-- Install prefix: /usr/local

-- Found FLEX: /usr/bin/flex (found version "2.6.4") 

-- TCL library: /usr/lib/x86_64-linux-gnu/libtcl.so

-- TCL header: /usr/include/tcl/tcl.h

-- SSTA: 0

-- Found SWIG: /usr/bin/swig4.0 (found suitable version "4.0.2", minimum required is "3.0")  

-- STA executable: /home/nchiolino/OpenROAD-flow-scripts/tools/OpenROAD/src/sta/app/sta

-- Found re2: /opt/or-tools/lib/cmake/re2/re2Config.cmake (found version "9.0.0") 

-- Found Clp: /opt/or-tools/lib/cmake/Clp/ClpConfig.cmake (found version "1.17.7") 

-- Found Cbc: /opt/or-tools/lib/cmake/Cbc/CbcConfig.cmake (found version "2.10.7") 

-- Found SCIP: /opt/or-tools/lib/cmake/scip/scip-config.cmake (found version "8.0.1") 

-- Found OpenMP_CXX: -fopenmp (found version "4.5") 

-- Found OpenMP: TRUE (found version "4.5")  

-- GPU is not enabled

-- TCL library: /usr/lib/x86_64-linux-gnu/libtcl.so

-- TCL header: /usr/include/tcl/tcl.h

-- GUI is enabled

-- Charts widget is enabled

-- Found Boost: /usr/local/lib/cmake/Boost-1.80.0/BoostConfig.cmake (found version "1.80.0") found components: serialization 

-- Could NOT find VTune (missing: VTune_LIBRARIES VTune_INCLUDE_DIRS) 

-- Found Boost: /usr/local/lib/cmake/Boost-1.80.0/BoostConfig.cmake (found suitable version "1.80.0", minimum required is "1.78")  

-- TCL library: /usr/lib/x86_64-linux-gnu/libtcl.so

-- TCL header: /usr/include/tcl/tcl.h

-- Found Boost: /usr/local/lib/cmake/Boost-1.80.0/BoostConfig.cmake (found version "1.80.0") found components: serialization system thread 

-- Found Boost: /usr/local/lib/Number of processor cores: 4

cmake/Boost-1.80.0/BoostConfig.cmake (found version "1.80.0")  

-- Found Eigen3: /usr/local/share/eigen3/cmake/Eigen3Config.cmake (found version "3.4.1") 

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To Reproduce

This is a proprietary technology so I am unable to provide design specific files for reproduction.

Relevant log output

No response

Screenshots

This is the outcome of PDN when not using -follow_pins image This is the outcome of PDN when using -follow_pins image

Additional Context

No response

maliberty commented 2 months ago

Do your macros have OBS on metal-1 blocking these rows? pdn should cut the stripes around obstructions.

gadfort commented 2 months ago

@nchiolino PDN will follow the rows, so if they rows are not cut around the macros it will short into them. I agree with @maliberty PDN should have cut the M1 followpins, which I can take a look at, but you will have issues later in your flow if the rows are not cut properly around the macros.

maliberty commented 2 months ago

You can display rows in the GUI

nchiolino commented 2 months ago

Yes, the macros have a block of meta-1 that is on the OBS LEF layer. The image below shows the macro with metal-1 obs, placement obstruction, and rows. Let me know if this image is how to discern. I can take a different screen shot. It looks like the rows are not but and the follow_pins option is going over the metal-1 obs. image

nchiolino commented 2 months ago

image

gadfort commented 2 months ago

@nchiolino how are you inserting your tapcells? It seems like you are missing a call to cut_rows.

nchiolino commented 2 months ago

Those gray objects you see are actually custom placement blockage that I need to use for metal-2 vertical power stripes. This process does not require tapcells. I dont know if this image helps anymore. image

maliberty commented 2 months ago

Are you running tapcell insertion? If not you need to run cut_rows.

maliberty commented 2 months ago

@gadfort jinx :)

gadfort commented 2 months ago

Even if your process doesn't need tapcells, you will still need to call: https://openroad.readthedocs.io/en/latest/main/src/tap/README.html#cut-rows Before power grid generation. This command is normally called as part of tapcells insertion.

nchiolino commented 2 months ago

Fantastic! Works like a charm. Maybe next time I will use the tool as intended and wont have to bother you all with so many issues. I really appreciate the support!

nchiolino commented 2 months ago

I apologize for re-opening this issue and I am not quite sure this is even an issue, to be honest, but I am desperatly trying to get the metal-1 horizontal stripes (blue) to connect to these vertical metal-2 stripes (red) on the sides of the macro. I am using this command to try and connect to the macro.

define_pdn_grid -name {Core_RAM_ROM} -voltage_domains {Core} -macro -orient {R0 R180 MX MY} -halo {0.0} -default -grid_over_boundary
add_pdn_connect -grid {Core_RAM_ROM} -layers {metal-1 metal-2}

Here is a screen shot of the connection I am wanting to make. It looks like the obstruction that comes with the macro cell is cutting the tapcells now and not allowing the metal-1 rows to run over to the metal-2 stripes. image

maliberty commented 2 months ago

@gadfort idk so hopefully you do

nchiolino commented 2 months ago

@gadfort. If need be, I can share my entire pdn.tcl file with you. Just need some time to redact portions of it.

nchiolino commented 2 months ago

And for whatever reason if I skip tapcell insertion, which know that I am using it I really dont want to do, the metal-1 horizontal stripes will connect to those metal-2 stripes. So its a problem with running pdn after tapcell somehow.

gadfort commented 2 months ago

@nchiolino the script would be helpful. Do you have a 3rd metal layer available? You might be able to place some games with the ring offsets to ensure they overlap the standard cell area (but it looks like the m1 will cause you some issues then).

nchiolino commented 2 months ago

Ok. Here is the pdn.tcl script I am using.

####################################
# global connections
####################################
add_global_connection -net VDD -pin_pattern {^VDD$} -power
add_global_connection -net VDD -pin_pattern {^vdd!$}
add_global_connection -net VDD -pin_pattern {^DVDD$}
add_global_connection -net VDD -pin_pattern {^VDDI$}
add_global_connection -net VSS -pin_pattern {^VSS$} -ground
add_global_connection -net VSS -pin_pattern {^gnd!$}
add_global_connection -net VSS -pin_pattern {^DVSS$}
add_global_connection -net VSS -pin_pattern {^GNDI$}
####################################
# voltage domains
####################################
set_voltage_domain -power VDD -ground VSS
####################################
# standard cell grid
####################################
define_pdn_grid -name "Core"
add_pdn_ring -grid "Core" -layers {metal-2 metal-3} -widths XXXX -spacings XXXX -pad_offsets {XX XX} -connect_to_pads

add_pdn_stripe -layer {metal-1} -width XXXX  -pitch XXXX  -offset XXXX -followpins
add_pdn_stripe -layer {metal-2} -width XXXX -spacing XXXX -pitch XXXX -offset XXXX -extend_to_core_ring

add_pdn_connect -layers {metal-1 metal-2}
add_pdn_connect -layers {metal-2 metal-3}

####################################
# macro grids
####################################
####################################
# grid for: Core_RAM_ROM
####################################
define_pdn_grid -name {Core_RAM_ROM} -voltage_domains {Core} -macro -orient {R0 R180 MX MY} -halo {0.0} -default -grid_over_boundary
add_pdn_connect -grid {Core_RAM_ROM} -layers {metal-1 metal-2}

pdngen

Yes, I do have metal-3. The ring that you see in the image is the ring that is custom in the macro. So I am trying to get the metal-1 horizontal stripes to connect to the ring that is in the macro. Like I said, I have seen it do it when I skip tapcell.

rovinski commented 2 months ago

Does cutting rows with a negative x halo width work?

maliberty commented 2 months ago

You mean to expand a row? No.

gadfort commented 2 months ago

@nchiolino I don't think you'll be able to connect the macro from M1, it would be easiest to connect from M3. The followpins will follow the rows and because you have metal on M1 you definitely want to cut the rows. Is there an issue with connected from M3?

The current functionality of PDN would not make what you want to do possible. One solution would be to allow a custom extension for the followpins to extend beyond the rows, but that is not available now and it would require some time to implement.

nchiolino commented 2 months ago

Understood. Unfortunately, I am constrained to three level of metals for signal and power which is why I am requesting all of these unusual features. I need to reserve the core area for metal-3 signal routing. For now, I have found an opening in the macro for metal-2 to connect to power and ground of the macro. Its not a lot of power but it will have to do for now. It would be nice to be able to distribute power from bottom up and top down if that is possible down the road. =)