Closed yupferris closed 1 year ago
@luis201420 would you take a quick look and see why the congestion is so high in this odd pattern? I'm guessing it relates to the power grid.
I investigated about the congestion in the design and I found that the issue happen because the access pins are blocked. The image shows the ces_3_3 macro, the green rectangles are the macro pins and the blue rectangles are the gcells with congestion (access to the macro pins). Those gcells are blocked due to the macro_extension = 2
of the design.
I suggest setting macro_extension
to 0 in order to eliminate congestion errors.
Shouldn't we automatically route through those gcells when using macro_extension ? (@eder-matheus any comments)
Shouldn't we automatically route through those gcells when using macro_extension ? (@eder-matheus any comments)
I expect that the macro_extension would work fine with the fake pin positions But in this case, I think the fake pins positions are also in an already congested area, so the macro extension makes it worse.
Also, I think we can completely remove the macro_extension from all of our platforms at some point. It was implemented to help drt, but I think we do not need it anymore. Almost all of our public platforms are not using this anymore, and I think we could try to extend it to asap7.
Ok let's try doing that for asap7. Will one of you make a PR and see if it works ok
Ok let's try doing that for asap7. Will one of you make a PR and see if it works ok
Yes, I can do it right now
@yupferris could you try it again with the latest master branch of ORFS? We've removed the macro extension option and you should not see the congestion error anymore.
yep, looks like this works, thanks!
Subject
[Stage]: Global Router.
Describe the bug
After cleaning up RTL and adding combinational paths to
mock-array-big
(#955), the design no longer gets past global routing due to too high congestion. Looking at the DRC report, there appear to be regular blockages over two lines across the design (see screenshot). I'm not able to glean much from the heatmap or zooming in.Expected Behavior
The
mock-array-big
design should go through the complete flow without errors.Environment
To Reproduce
Reproduction case (on Dropbox; it seems I'm unable to upload such a large file via my browser): https://www.dropbox.com/s/v6z9q811oufgrfj/global_route_routing_congestion.tar.gz?dl=0
Steps:
make DESIGN_CONFIG=./designs/asap7/mock-array-big/config.mk
Relevant log output
Screenshots
Additional Context
Note that #955 doesn't affect element macro size/placement, though it does affect IO placement.