Open jaemin0502 opened 1 week ago
I don't see any file test.size (or test.tcl) uploaded here.
Note: the repo to clone is git@github.com:ASU-VDA-Lab/2024_ICCAD_Contest_Gate_Sizing_Benchmark.git and various files need to be bunzip2'ed.
I uploaded test.txt file and you can change this to test.size.
Now I get
Error: Instance "FE_PHC4441_csb2cmac_a_req_pvld" not found.
Please make a self-contained test case as this is not efficient.
I'm sorry but the repo "git@github.com:ASU-VDA-Lab/2024_ICCAD_Contest_Gate_Sizing_Benchmark.git" was committed exactly the day you downloaded the test design and this caused the error you said.
When you want to reproduce the error without downloading the previous code, please simply change the line 1530 of "2024_ICCAD_Contest_Gate_Sizing_Benchmark/design/NV_NVDLA_partition_m/NV_NVDLA_partition_m.size" to "FE_RC_7074_0 O2A1O1Ixp33_ASAP7_75t_R" and run "cd 2024_ICCAD_Contest_Gate_Sizing_Benchmark/src/evaluation/ & openroad -python evaluation.py --file_path ../../design/NV_NVDLA_partition_m/NV_NVDLA_partition_m.size --design_name NV_NVDLA_partition_m"
sta checks more than the function to determine equivalence. O2A1O1Ixp33_ASAP7_75t_R has 12 timing arcs while O2A1O1Ixp5_ASAP7_75t_R has 11. They are therefore not considered equivalent.
I don't know why they have a different number of arcs. That seems like a library issue.
The library seems ok but https://github.com/parallaxsw/OpenSTA/discussions/42
Describe the bug
Error detected while finding the equivalent cells using ASAP7 PDK.
It seems that OpenSTA don't observe that "O2A1O1Ixp5_ASAP7_75t_R" and "O2A1O1Ixp33_ASAP7_75t_R" are logically equivalent.
Expected Behavior
They should be considered logically equivalent cells. I can see the same functions as show below.
function : "(!A1 !A2 !C) + (!B !C)"; function : "(!A1 !A2 !C) + (!B !C)";
Environment
To Reproduce
After cloning the github repo below, I ran, "cd 2024_ICCAD_Contest_Gate_Sizing_Benchmark/src/evaluation/ & openroad -python evaluation.py --file_path test.size --design_name NV_NVDLA_partition_m" https://github.com/ASU-VDA-Lab/2024_ICCAD_Contest_Gate_Sizing_Benchmark/tree/main I uploaded test.tcl file in this issue post. (please change the name of the file into test.size)
Relevant log output
No response
Screenshots
Additional Context
No response