Segmentation fault in read_sdf

[Forty-Bot]

OpenSTA crashes when reading the SDF generated from the following module:

module test (
    input clk, d,
    output reg q,
);

    initial q = 0;
    always @(posedge clk)
        q <= q ^ d;

endmodule

I used the following script to trigger the problem:

#!/bin/bash
yosys -qp "synth_ice40 -top test" -b json -o test.synth.json -f verilog test.v
nextpnr-ice40 --json test.synth.json --write test.post.json --sdf test.sdf --asc test.asc
yosys -qp 'write_verilog -defparam' -f json test.post.json > test.post.v
yosys -qp "read_verilog -lib -nowb $(yosys-config --datdir)/ice40/cells_sim.v; write_verilog -blackboxes cells_sim.v"
gdb sta <(echo "
    read_verilog cells_sim.v
    read_verilog test.post.v
    link_design top
    read_sdf test.sdf
")

And got the following stack trace

% read_sdf test.sdf
Warning: test.sdf line 13, pin $gbuf_clk$SB_IO_IN_$glb_clk/GLOBAL_BUFFER_OUTPUT not found.
Warning: test.sdf line 14, pin $gbuf_clk$SB_IO_IN_$glb_clk/USER_SIGNAL_TO_GLOBAL_BUFFER not found.

Program received signal SIGSEGV, Segmentation fault.
-----------------------------------------------------------------------------------------------------------------------[regs]
  RAX: 0x0000555555965698  RBX: 0x00007FFFFFFFD120  RBP: 0x0000555555B4DCA0  RSP: 0x00007FFFFFFFD0F0  o d I t s z a P c 
  RDI: 0x00007FFFFFFFD120  RSI: 0x0000000000000000  RDX: 0x0000555555600E60  RCX: 0x0000555555A59690  RIP: 0x00005555556038C0
  R8 : 0x0000555555B9A810  R9 : 0x000000000000000F  R10: 0x0000000000000011  R11: 0xB0B5B5B155499D1E  R12: 0x00007FFFFFFFD970
  R13: 0x0000555555A08200  R14: 0x00007FFFFFFFD120  R15: 0x0000555555A08200
  CS: 0033  DS: 0000  ES: 0000  FS: 0000  GS: 0000  SS: 002B                
-----------------------------------------------------------------------------------------------------------------------[code]
=> 0x5555556038c0 <_ZN3sta20VertexInEdgeIteratorC2EPNS_6VertexEPKNS_5GraphE+32>:    mov    esi,DWORD PTR [rsi+0x14]
   0x5555556038c3 <_ZN3sta20VertexInEdgeIteratorC2EPNS_6VertexEPKNS_5GraphE+35>:    mov    rax,QWORD PTR [rax+0x40]
   0x5555556038c7 <_ZN3sta20VertexInEdgeIteratorC2EPNS_6VertexEPKNS_5GraphE+39>:    cmp    rax,rdx
   0x5555556038ca <_ZN3sta20VertexInEdgeIteratorC2EPNS_6VertexEPKNS_5GraphE+42>:    jne    0x555555603900 <_ZN3sta20VertexInEdgeIteratorC2EPNS_6VertexEPKNS_5GraphE+96>
   0x5555556038cc <_ZN3sta20VertexInEdgeIteratorC2EPNS_6VertexEPKNS_5GraphE+44>:    mov    rdx,QWORD PTR [rbp+0xb0]
   0x5555556038d3 <_ZN3sta20VertexInEdgeIteratorC2EPNS_6VertexEPKNS_5GraphE+51>:    test   esi,esi
   0x5555556038d5 <_ZN3sta20VertexInEdgeIteratorC2EPNS_6VertexEPKNS_5GraphE+53>:    je     0x555555603918 <_ZN3sta20VertexInEdgeIteratorC2EPNS_6VertexEPKNS_5GraphE+120>
   0x5555556038d7 <_ZN3sta20VertexInEdgeIteratorC2EPNS_6VertexEPKNS_5GraphE+55>:    mov    rcx,QWORD PTR [rdx+0x10]
-----------------------------------------------------------------------------------------------------------------------------
0x00005555556038c0 in sta::VertexInEdgeIterator::VertexInEdgeIterator (this=this@entry=0x7fffffffd120, vertex=0x0, graph=0x555555b4dca0) at graph/Graph.cc:1516
1516      next_(graph->edge(vertex->in_edges_)),
gdb$ bt
#0  0x00005555556038c0 in sta::VertexInEdgeIterator::VertexInEdgeIterator (this=this@entry=0x7fffffffd120, vertex=0x0, graph=0x555555b4dca0) at graph/Graph.cc:1516
#1  0x000055555567191e in sta::SdfReader::findWireEdge (this=this@entry=0x7fffffffd970, from_pin=from_pin@entry=0x555555a08200, to_pin=to_pin@entry=0x555555a08890) at sdf/SdfReader.cc:252
#2  0x000055555567349c in sta::SdfReader::interconnect (this=0x7fffffffd970, from_pin_name=0x555555b9a740 "d$sb_io/D_IN_0", to_pin_name=0x555555b9aad0 "d_SB_LUT4_I3_LC/I3", triples=0x555555b9ad00) at sdf/SdfReader.cc:191
#3  0x00005555556ee807 in SdfParse_parse () at sdf/SdfParse.yy:175
#4  0x00005555556716d3 in sta::SdfReader::read (this=0x7fffffffd970) at sdf/SdfReader.cc:145
#5  0x0000555555671839 in sta::readSdf (filename=filename@entry=0x555555b3d960 "test.sdf", path=path@entry=0x0, corner=corner@entry=0x5555559ca730, unescaped_dividers=unescaped_dividers@entry=false, incremental_only=incremental_only@entry=false, cond_use=cond_use@entry=0x0, sta=0x555555a01830) at sdf/SdfReader.cc:94
#6  0x00005555555db6bd in read_sdf_file (cond_use=0x0, incremental_only=<optimized out>, unescaped_dividers=<optimized out>, corner=0x5555559ca730, path=0x0, filename=0x555555b3d960 "test.sdf") at build/CMakeFiles/sta_swig.dir/StaAppTCL_wrap.cxx:6855
#7  _wrap_read_sdf_file (clientData=<optimized out>, interp=0x55555599d0a0, objc=<optimized out>, objv=<optimized out>) at build/CMakeFiles/sta_swig.dir/StaAppTCL_wrap.cxx:37889
#8  0x00007ffff7deecd2 in TclNRRunCallbacks () from /usr/lib/libtcl.so
#9  0x00007ffff7e8f175 in Tcl_RecordAndEvalObj () from /usr/lib/libtcl.so
#10 0x00007ffff7eb4d6c in Tcl_MainEx () from /usr/lib/libtcl.so
#11 0x00005555555ab039 in main (argc=1, argv=0x7fffffffdec8) at app/Main.cc:92

To aid in reproduction, I have uploaded the full contents of the direct inputs to sta. Please let me know if you need any additional information.

[jjcherry56]

Please package a tarfile with all of the files necessary to run opensta. No shells scripts. No yosys runs. No echo to files. Just the inputs to opensta tar'd and compressed and attached to the issue.

[Forty-Bot]

It's in the gist linked at the end of the issue. There's even a zip file.

[jjcherry56]

I refuse to waste my time trying to piece together a testcase. The "zip file" has to tcl command file or libraries.

[Forty-Bot]

Here's your tcl

read_verilog cells_sim.v
read_verilog test.post.v
link_design top
read_sdf test.sdf

[jjcherry56]

I fixed it so it does not seg fault but you aren't going to get anywhere without liberty cells.