Closed egiacomin closed 5 years ago
Hi egiacomin,
This issue is for TD-RePlAce, not for OpenSTA. The warning you're facing is not a problem at all. (I still have to learn about SPEF delimiter's rule in OpenSTA. I wrote a simple checker whenever OpenSTA is instantiated in here (inside RePlAce))
I'll remove such a warning in the near future.
(RePlAce would be rewritten in the near feature)
Thanks for the quick reply. I'll ignore those warnings for now then.
Hello, Currently using the OpenROAD flow but I get a warning during the STA Placement step:
OpenSTA Copyright (c) 2018, Parallax Software, Inc. License GPLv3: GNU GPL version 3 http://gnu.org/licenses/gpl.html
This is free software, and you are free to change and redistribute it under certain conditions; type
show_copying' for details. This program comes with ABSOLUTELY NO WARRANTY; for details type
show_warranty'. INFO: Now linking: grid_clb INFO: Successfully linked: grid_clb Warning: , line 1 net grid_clb0\/fle_2ff_phy_1D0 not found.My Verilog was a structural Verilog design which I fed into Synopsys DC in order to get a flat design. As such, many net names have "/" in their name. I replaced those by underscore and it seems to alleviate the issue. Is the parser not capable of dealing with "/" characters?