TheClams / SystemVerilog

SystemVerilog plugin for Sublime Text
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Code alignment feature can lead to code breaks in certain scenarios #73

Closed rayqqqm closed 5 months ago

rayqqqm commented 7 months ago

When align module instantiations, comments don't seem to be handled correctly and will lead to code breaks. for example:

before alignment

sub_mod1 #(.PARA1(PARA1)) inst1    //this comment will lead to error
(
    .io1(sm1),
    .io2(sm2),
    .io3(sm3)
);

sub_mod1 #(.PARA2(PARA2)) inst2    
(
    .io1(sm1),
    .io2(sm2),
    .io3(sm3)
    //this comment will lead to error
);

after alignment

sub_mod1 #(.PARA1(PARA1)) inst1    //this comment will lead to error
    (
        .io1(sm1),
        .io2(sm2),
        .io3(sm3)

sub_mod1 #(.PARA2(PARA2)) inst2 (
    .io1(sm1),
    .io2(sm2),
    .io3(sm3),
    //this comment will lead to error
);

you can see the 1st instantiation miss ')' and ';' and an extra comma is created on the last line of the 2nd instantiation.

TheClams commented 5 months ago

Fixed in 3.3.4

rayqqqm commented 4 months ago

Find a new err, think maybe similar problem. comment writing in the following 2 styles will lead to err.

module test #(
    parameter PARA1 = 1,
    parameter PARA2 = 2
    )   //this comment will lead to err
(
    input clk ,
    input rst ,
    input din ,
    input dout
);

endmodule
module test #(
    parameter PARA1 = 1,
    parameter PARA2 = 2 )   //this comment will lead to err
(
    input clk ,
    input rst ,
    input din ,
    input dout
);

endmodule

the err results are like

module test #(
    parameter PARA1 = 1,
    parameter PARA2 = 2
    )   //this comment will lead to err
    (
    input clk ,
    input rst ,
    input din ,
    input dout
) ();                          //extra()here

endmodule