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TheSystemDevelopmentKit / rtl

Package for rtl (i.e. Verilog and VHDL ) simulation control
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vhdl_testbench - Parameter definitions #56

Closed mkosunen closed 1 year ago

mkosunen commented 1 year ago

To be handled as constants. Type may cause problems.

mkosunen commented 1 year ago

Closed by https://github.com/TheSystemDevelopmentKit/rtl/pull/51/commits/5e7f4c3ec89fb7af6931968fec4cb5291313e878