ThinkOpenly / sail-riscv

Sail RISC-V model
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Add instruction descriptions #2

Open ThinkOpenly opened 10 months ago

ThinkOpenly commented 10 months ago

It would be really nice to be able to extract human-readable function descriptions from the respective Sail definitions. This text may not yet readily exist for all instructions, but it certainly exists for many in what may or may not be easily extracted prose in the RISC-V Instruction Set Manual. One suggested implementation is to use "doc-comments":

/*!
 * The target address is obtained by adding the sign-extended 12-bit
 * I-immediate to the register rs1, then setting the
 * least-significant bit of the result to zero. The address of the
 * instruction following the jump (pc+4) is written to register rd.
 * Register x0 can be used as the destination if the result is not
 * required.
 */
union clause ast = RISCV_JALR : (bits(12), regidx, regidx)