Open jimmyhon opened 1 year ago
My closest 7z b -mtt=8
score to dmc governor=performance is using upthreshold/downdifferential=10 and 5 (10_5)
[alarm@cinq ~]$ tail -n2 dmc_*
==> dmc_ondemand_10_5 <==
Avr: 731 2065 15091 | 681 2543 17314
Tot: 706 2304 16202
==> dmc_ondemand_20_10 <==
Avr: 727 2025 14717 | 680 2449 16645
Tot: 703 2237 15681
==> dmc_ondemand_20_20 <==
Avr: 748 1994 14908 | 681 2583 17582
Tot: 714 2289 16245
==> dmc_ondemand_25_20 <==
Avr: 741 1995 14774 | 681 2434 16566
Tot: 711 2214 15670
==> dmc_ondemand_40_20 <==
Avr: 750 1714 12848 | 681 2433 16565
Tot: 715 2074 14706
==> dmc_performance <==
Avr: 724 2015 14571 | 681 2583 17598
Tot: 702 2299 16085
When using upthreshold/downdifferential=20_20, I experience the same issue of the memory clock not dropping back to idle.
When looking at cat /sys/class/devfreq/dmc/trans_stat
, the 7z benchmark using (10_5) there around 20 transitions between 1.0 GHz and 2.1 GHz clocks.
Sorry for having this ignored for so long. But I wanted to integrate at least one other Rockchip SoC into testing before proceeding (generating settings that provide better performance while not harming idle or 'medium load' consumption too much).
One of my RK3568 machines is available for testing again (BTW: the DMC stuff also affects RK3528) and I have a NetIO powermeter in the lab.
Did you come to different conclusions in the meantime?
Regarding using a
upthreshold
of 20 vs 25. Have you considered lowering thedowndifferential
to get the memory frequency back down to idle?With the default downdifferential of 20 [1], by changing the upthreshold to 20, governor will stay at the same frequency almost all the time once it's boosted up. [2] (i.e. upthreshold - downdifferential is 0, so the frequency will not drop unless busy_time is 0.)