Open ThomsonTang opened 7 years ago
bit
is a basic unit of information in computing and digital communications. A bit can have only one of two values, and may therefore be physically implemented with a two-state devices. Theres values are most commonly represented as either a 0
or 1
.Virtual Memory is an elegant interaction of hardware exceptions, hardware address translation, main memory, disk files, and kernel software that provides each process with a large, uniform, and private address space.
VM provides three important capabilities:
Used in “simple” systems like embedded micro-controllers in devices like cars, elevators, and digital picture frames.
- Used in all modern servers, desktops, and laptops
- One of the great ideas in computer science
- Address translation: the task of converting a virtual address to a physical one. Dedicated hardware on the CPU chip called the
memory management unit(MMU)
translates virtual addresses on the fly, using a look-up table stored in main memory whose contents are managed by the operating system.
{0, 1, 2, ...}
N = 2^n
addresses.
{0, 1, 2, ..., N-1}
M
bytes of physical memory in the system:
{0, 1, 2, ..., M-1}
- Clean distinction between data (bytes) and their attributes (address)
- Each object can now have multiple addresses
- Every byte in main memory: one physical address, one (or more) virtual address
VM systems handle this by partitioning the virtual memory into fixed-sized blocks called virtual pages (VPs). Each virtual page is P=2^p bytes in size. Similarly, physical memory is partitioned into physical pages (PPs), also P bytes in size. (Physical pages are also referred to as page frames.)
Three disjoint subsets of virtual pages:
the bottom line is that the organization of the DRAM cache is driven entirely by the enormous cost of misses.(归根结底,DRAM缓存的组织结构完全是由巨大的不命中开销驱动的)
- DRAM cache organization driven by the enormous miss penalty:
- DRAM is about
10x
slower than SRAM(the L1, L2 and L3 cache)- Disk is about
10,000x
slower than DRAM
4-8 KB
, sometimes 4MB
As with any cache, the VM system must have some way to determine if a virtual page is cached somewhere in DRAM. These capabilities are provided by a combination of operating system software, address translation hardware in the MMU(memory management unit), and a data structure stored in physical memory known as a page table that maps virtual pages to physical pages.
A page table is an array of page table entries(PTEs) that maps virtual pages to physical pages.
The indications of each PTE which consists of a valid bit and an n-bit address field:
Page hit: reference to VM word that is in physical memory (DRAM cache hit).
In virtual memory parlance, a DRAM cache miss is known as a page fault.
Page fault: reference to VM word that is not in physical memory (DRAM cache miss).
Virtual memory was still a useful mechanism because it greatly simplified memory management and provided a natural way to protected memory. In fact, operating system provide a separate page table, and thus a separate virtual address space, for each process.
In particular, VM simplifies linking and loading, the sharing of code and data, and allocating memory to applications.
Liking
Loading
execve()
allocates virtual pages for .text and .data sections = creates PTEs marked as invalid
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