A latency-hating emulator of: the Acorn Electron and Archimedes, Amstrad CPC, Apple II/II+/IIe and early Macintosh, Atari 2600 and ST, ColecoVision, Enterprise 64/128, Commodore Vic-20 and Amiga, MSX 1/2, Oric 1/Atmos, early PC compatibles, Sega Master System, Sinclair ZX80/81 and ZX Spectrum.
i.e. internal lingo for: something that decodes an instruction and then calls an appropriate second location with the details; distinct from a decoder because there is no formal internal representation of an ARM instruction separating decoding from whatever you were decoding for.
The destination could construct some sort of intermediate form of instruction, whether explicitly or implicitly by scheduling it as the next step in a pipeline, or could perform it immediately if only an ARM2 interpreter is required rather than an emulation of any concrete ARM chip.
Also includes a few more uses of = default rather than declaring custom empty constructors/etc.
Moderate risk: with nothing outside of a test case yet attempting to use this code, this PR alone is insufficient to have tested it across all CI targets.
i.e. internal lingo for: something that decodes an instruction and then calls an appropriate second location with the details; distinct from a decoder because there is no formal internal representation of an ARM instruction separating decoding from whatever you were decoding for.
The destination could construct some sort of intermediate form of instruction, whether explicitly or implicitly by scheduling it as the next step in a pipeline, or could perform it immediately if only an ARM2 interpreter is required rather than an emulation of any concrete ARM chip.
Also includes a few more uses of
= defaultrather than declaring custom empty constructors/etc.Moderate risk: with nothing outside of a test case yet attempting to use this code, this PR alone is insufficient to have tested it across all CI targets.