A number of properties of the current PCI API make it inefficient, and able to
be improved.
First of all, no return values are checked. This makes the parameter sanity
checking logic useless. Convert pci_write() to being void, and let pci_read()
return the value, rather than forcing it to spilled to the stack and returned
by pointer.
The seg parameter is unconditionally zero so can be dropped, and almost all
callers pass constants. Expect callers to align their requests properly and
drop the alignment fixup logic. Furthermore, register lengths of 3 are
nonsense.
At this point, the fact that we have two access mechanisms is forcing the use
of function pointers. By limiting support to Fam15h and later (2011+), we can
require MMCFG and remove the cf8/cfc I/O space accessors.
The length parameter will always be a compile time constant. Express the
helpers as static inlines with an {8,16,32} suffix for width of access. As
most other parameters are also constant, this allows the compiler to compute
PCI_MMIO_ADDRESS() as:
mov mmio_base_addr(%rip), %eax
or $0xXXXXXXXX, %eax
in the common case, with no shifting or masking at runtime.
Finally, swap mmio_base_addr from void * to u32, as it is necessarily below
the 4G boundary. This halves the required storage and shortens the
instructions required to use it.
A number of properties of the current PCI API make it inefficient, and able to be improved.
First of all, no return values are checked. This makes the parameter sanity checking logic useless. Convert pci_write() to being void, and let pci_read() return the value, rather than forcing it to spilled to the stack and returned by pointer.
The seg parameter is unconditionally zero so can be dropped, and almost all callers pass constants. Expect callers to align their requests properly and drop the alignment fixup logic. Furthermore, register lengths of 3 are nonsense.
At this point, the fact that we have two access mechanisms is forcing the use of function pointers. By limiting support to Fam15h and later (2011+), we can require MMCFG and remove the cf8/cfc I/O space accessors.
The length parameter will always be a compile time constant. Express the helpers as static inlines with an {8,16,32} suffix for width of access. As most other parameters are also constant, this allows the compiler to compute PCI_MMIO_ADDRESS() as:
mov mmio_base_addr(%rip), %eax or $0xXXXXXXXX, %eax
in the common case, with no shifting or masking at runtime.
Finally, swap mmio_base_addr from void * to u32, as it is necessarily below the 4G boundary. This halves the required storage and shortens the instructions required to use it.
Overall, the resulting shrinkage is:
add/remove: 0/6 grow/shrink: 0/7 up/down: 0/-714 (-714) Function old new delta dev_flush_cache 68 66 -2 mmio_base_addr 8 4 -4 pci_write 8 - -8 pci_read 8 - -8 dev_load_map 148 140 -8 dev_write 77 56 -21 dev_read.constprop 83 51 -32 pci_init 84 29 -55 dev_locate 166 94 -72 pci_mmio_write 123 - -123 pci_mmio_read 123 - -123 pci_conf1_write 125 - -125 pci_conf1_read 133 - -133 Total: Before=49039, After=48325, chg -1.46%
for what should be no change in behaviour.
Signed-off-by: Andrew Cooper andrew.cooper3@citrix.com