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UCI-HyperXite / inverter-control

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Resolve low side issue with SPDM #26

Closed samderanova closed 6 months ago

samderanova commented 6 months ago

Powers worked with Misha and discovered that the low side of the SPDM is supposed to be set at a constant high (1) voltage. @c11whaley and @riyagoja can comment more on why this is below, but essentially, the gate driver only needs the high side control signal and it automatically generates a complementary signal for the low side. This means that we no longer need to generate the low side signal, which could potentially also mean that we can achieve a higher switching frequency.

This issue is partially blocked by #25 since we'll want to simplify the code first before resolving this issue.

taesungh commented 6 months ago

@c11whaley indicated that the input/enable behavior is only for the test circuit, and the gate drivers for the actual VFD will still need complementary inputs. We'll want to modify set_inverter_pins_ to output based on some global constant indicating which circuit we're on.