large MM (intel) will result in deadlock on real hardware execution. I tried different SA configurations, and none of them worked. I tested on vLab S10 GX2800 with AOC 18.2. The only change I've made is that I removed the __burst intrinsics and HBM attribute since there is no HBM on that device.
LU example on Alveo FPGA board. I changed the input matrix size to 8x8. I was able to compile the generated code. However, the HW result is not 100% correct. Is this example only tested for 3x3?
Hi, it is me again.
Just to report two new issues I found recently.
large MM (intel) will result in deadlock on real hardware execution. I tried different SA configurations, and none of them worked. I tested on vLab S10 GX2800 with AOC 18.2. The only change I've made is that I removed the
__burstintrinsics andHBMattribute since there is no HBM on that device.LU example on Alveo FPGA board. I changed the input matrix size to 8x8. I was able to compile the generated code. However, the HW result is not 100% correct. Is this example only tested for 3x3?