Open DannyNicholls opened 10 years ago
That is possible and it shouldn't be too much of an issue. I will work on this today, and see how I get along...
Amazing. No rush, it would just be a bonus. For now I have written a wrapper so it should work for 16 core and 64 core networks.
I know that currently the source and destination is entered into the
packet_t
typedef as a single number, my problem is that for mesh networks it's not a very useful way of addressing cores.Could you add an option to generate source/destination numbers as a grid reference please. So instead of telling it you wanted 10 ports, tell it you want 5 in the X direction and 2 in the Y direction
i.e for a 16 core network instead of 4 bit
logic [log2(PORTS)-1:0] source;
it would have a 2 bitlogic [log2(X_PORTS)-1:0] x_source;
and a 2 bitlogic [log2(Y_PORTS)-1:0] y_source;
and instead of 4 bit
logic [log2(PORTS)-1:0] dest;
it would have a 2 bitlogic [log2(X_PORTS)-1:0] x_dest;
and a 2 bitlogic [log2(Y_PORTS)-1:0] y_dest;
It actually works currently if the network is a square mesh containing 2^n ports but that is limiting!