UCSBarchlab / PyRTL

A collection of classes providing simple hardware specification, simulation, tracing, and testing suitable for teaching and research. Simplicity, usability, clarity, and extensibility are the overarching goals, rather than performance or optimization.
http://ucsbarchlab.github.io/PyRTL
BSD 3-Clause "New" or "Revised" License
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Add wire_struct and wire_matrix examples #448

Open fdxmw opened 3 months ago

fdxmw commented 3 months ago

Add examples demonstrating wire_struct and wire_matrix.

For wire_struct, maybe show a simple direct-mapped cache, using wire_struct to aggregate the tag, data, and valid bits for each cache entry.

For wire_matrix, maybe add some vectors?