Closed l-kent closed 9 months ago
I was just looking at this bug! Seems to be a regression in aslp.
This is obviously the fault of https://github.com/UQ-PAC/aslp/commit/fc60f76057a35538b7e43c6e128a1b0983b868b8
Do you know which instruction caused this error? (knowing gtirb-semantics, probably not). In the aslp tests, this was blamed on tbx v1.16b, {v31.16b, v0.16b}, v31.16b
(and similar) which is a rather complex SIMD instruction.
Snippet before:
if slt_bits.0 {{ 9 }} ( Cse16__5,'000100000' ) then {
assert and_bool.0 {{ }} ( sle_bits.0 {{ 9 }} ( '000000000',Cse16__5 ),sle_bits.0 {{ 13 }} ( ZeroExtend.0 {{ 12,13 }} ( mul_bits.0 {{ 12 }} ( ZeroExtend.0 {{ 9,12 }} ( add_bits.0 {{ 9 }} ( Cse16__5,'000000001' ),12 ),'000000001000' ),13 ),'0000100000000' ) ) ;
result__4 = append_bits.0 {{ 120,8 }} ( __array _Z [ 1 ] [ 8 +: 120 ],lsr_bits.0 {{ 256,12 }} ( Cse14__5,ZeroExtend.0 {{ 11,12 }} ( mul_bits.0 {{ 11 }} ( ZeroExtend.0 {{ 8,11 }} ( __array _Z [ 31 ] [ 0 +: 8 ],11 ),'00000001000' ),12 ) ) [ 0 +: 8 ] [ 0 +: 8 ] ) ;
}
After:
if ( cvt_bits_uint.0 {{ }} ( Exp6__5 [ 0 +: 8 ] ) < 32 ) then {
assert ( ( cvt_bits_uint.0 {{ }} ( Exp6__5 [ 0 +: 8 ] ) >= 0 ) && ( ( ( cvt_bits_uint.0 {{ }} ( Exp6__5 [ 0 +: 8 ] ) + 1 ) * 8 ) <= 256 ) ) ;
result__4 = ( Exp13__5 [ 8 +: 120 ] : ( Exp11__5 [ 0 +: 128 ] : Exp9__5 [ 0 +: 128 ] ) [ ( cvt_bits_uint.0 {{ }} ( Exp6__5 [ 0 +: 8 ] ) * 8 ) +: 8 ] ) ;
}
So we can see the slice of a register with a non-static slice was previously lowered to a shift+truncate, but this was not done in the new output.
Fixed by https://github.com/UQ-PAC/aslp/commit/a2b5cf4002417faef7920bc9b22dda5faccc91d8. The Nix packages will take some time to update.
gtirb-semantics-nix fails for the following gtirb file: cntlm.gtirb.txt with the error: