dkgrizzly
commented
10 months ago I have done similar on the IIgs version that I need to release soon, but using a Xilinx CPLD which can be reprogrammed in-circuit by the RP2040.
Any cards which use the $C8xx window are supposed to access $CFFF before jumping to their $C8xx routines (there are a few technotes about this.)
The revision I have in testing right now has a jumper to disable the $C8xx window entirely, as well as some jumpers for mode selection and machine type.
rallepalaveev
I have worked on a hardware implementation, replacing the 16V8 by a 22V10, which has more pins and could completely resolve the address $CFFF to turn off ExtROM only by accessing this single address - I have posted on my fork, would be nice to have some feedback if the firmware is actually accessing $CFFF or some other address in the $CFxx area.
Here is the code:
PIN [1..11] = [A0..10]; PIN 13 = !IOSEL; PIN 14 = !DEVSEL; PIN 15 = !SEL; PIN 16 = !RESET; PIN 17 = !IOSTR; PIN [18..21] = [BSEL3..0]; PIN 22 = EXTENABLE; PIN 23 = EXTDISABLE; EXTDISABLE = !(EXTENABLE # IOSEL); EXTENABLE = !(EXTDISABLE # RESET # (IOSTR & [A0..10]:'b'11111111111 & [BSEL3..0]:'b'101X) # [BSEL3..0]:'b'0111); SEL = DEVSEL # IOSEL # (EXTENABLE & IOSTR);